Oxide Thin-Film Transistor Layout for Stable Doped Contact Regions
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Thin film transistors, particularly those used in display apparatuses, face limitations in manufacturing cost, process complexity, and electrical stability due to the requirements of high temperature crystallization and uniformity, especially in large-area applications, and the influence of insulation layers on conductivity-providing regions.
Innovation Solution
A thin film transistor design that includes a conductivity-providing part formed through doping without patterning the gate insulation layer, utilizing an active layer with an offset part to secure electrical stability and minimize insulation layer influence, and adjusting the size of the photoresist pattern to form an offset between the conductivity-providing and channel parts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If poly-Si TFTs are manufactured using high temperature crystallization process, then electron mobility and stability are improved, but manufacturing cost and process complexity increase
Solution Approach 1:
The patent changes the material parameter from polycrystalline silicon to oxide semiconductor, which allows achieving high electron mobility and stability without requiring high temperature crystallization processes. This parameter change resolves the contradiction by finding an alternative material that inherently provides the desired electrical properties without complex manufacturing steps.
2Ease of manufacture
If oxide semiconductor TFTs are manufactured with conventional structures, then manufacturing cost is reduced, but insulation layers influence the conductivity-providing region
Solution Approach 1:
The patent segments the active layer into distinct functional regions: a channel part overlapping the gate electrode and a conductivity-providing part not overlapping the gate electrode. This segmentation allows the conductivity-providing part to be doped for low resistance contact while the channel part remains undoped for proper switching characteristics, preventing the insulation layer from influencing the conductivity-providing region and resolving the electrical stability issue.
Solution Approach 2:
The patent applies local quality by doping only specific regions (conductivity-providing parts) while leaving other regions (channel part) undoped. This localized doping approach ensures that the doped regions provide good electrical contact without affecting the channel characteristics, thereby maintaining electrical stability while keeping manufacturing simple.
3Productivity
If a-Si TFTs are used to reduce manufacturing time and cost, then threshold voltage shift occurs and driving performance is reduced
Solution Approach 1:
The patent changes the semiconductor material parameter from amorphous silicon to oxide semiconductor. This material parameter change enables achieving high electron mobility and stable threshold voltage characteristics that are comparable to or better than poly-Si TFTs, while maintaining the manufacturing simplicity and low cost advantages, thus resolving the contradiction between manufacturing efficiency and driving performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances electrical stability, reduces leakage currents, and maintains effective channel width, enabling efficient manufacturing and improved performance in display apparatuses while minimizing the impact of insulation layers.
Implementation Method 1
a gate insulation layer between the active layer and the gate electrode, wherein the gate insulation layer covers a whole top surface of the active layer
Implementation Method 2
The conductivity-providing part is doped with a dopant
Data Source
Figure 1~2
Figure 3~4
Figure 5~6
AI summary
An embodiment of the present disclosure provides a thin film transistor (100), a method of manufacturing the thin film transistor and a display apparatus including the thin film transistor. The thin film transistor includes an active layer (130) on a substrate (110), a gate electrode (140) disposed apart from the active layer to at least partially overlap the active layer, and a gate insulation layer (150) between the active layer and the gate electrode. The gate insulation layer may cover a whole top surface of the active layer facing the gate electrode. The active layer may include a channel part (131) overlapping the gate electrode, a conductivity-providing part (133a, 133b) which does not overlap the gate electrode, and an offset part (132a, 132b) between the channel part and the conductivity-providing part. The offset part may not overlap the gate electrode, and the conductivity-providing part may be doped with a dopant.