Oxide Semiconductor TFT Layout for Fast Driver and Pixel Circuits
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving high operation speed for driver circuits while maintaining stable electric characteristics, especially when channel length is reduced, and in efficiently forming both driver and pixel circuits on a single substrate without increasing manufacturing complexity and costs.
Innovation Solution
The semiconductor device incorporates bottom-gate thin film transistors with light-transmitting electrodes and oxide semiconductor layers, utilizing conductive layers with lower resistance than the electrodes to enhance operation speed and stability, and includes a structure with high-resistance regions to reduce leakage current and improve dielectric withstand voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the channel length L is reduced to increase operation speed, then the operation speed is improved, but the switching characteristic (on-off ratio) is lowered
Solution Approach 1:
The patent changes the material parameter of the semiconductor layer from conventional semiconductor to oxide semiconductor, which fundamentally alters the electrical characteristics. This material parameter change enables high operation speed while maintaining excellent switching characteristics even with reduced channel length, as oxide semiconductors provide both high carrier mobility and stable off-state current characteristics
Solution Approach 2:
The patent employs a composite structure combining oxide semiconductor layer with specific gate insulating layer configurations. This composite material approach creates a system where the oxide semiconductor works synergistically with the gate insulating structure to achieve both high-speed operation and stable switching characteristics that neither material could achieve alone
2Speed
If the channel width W is increased to increase operation speed, then the operation speed is improved, but the capacity load of the thin film transistor is increased
Solution Approach 1:
By changing the semiconductor material to oxide semiconductor, the patent achieves higher carrier mobility, which allows for reduced channel width while maintaining operation speed. This parameter change in material properties enables speed improvement without the need to increase channel width, thereby avoiding increased capacity load
3Ease of manufacture
If both driver circuit and pixel portion are formed on one substrate to reduce manufacturing cost, then manufacturing cost is reduced, but the process complexity increases
Solution Approach 1:
The patent employs a universal oxide semiconductor-based thin film transistor design that can serve multiple functions in both driver circuits and pixel portions. The same basic TFT structure and oxide semiconductor material system are used throughout, allowing both circuit types to be formed on one substrate using compatible processes, thereby reducing manufacturing cost without proportionally increasing process complexity
Solution Approach 2:
While using a universal oxide semiconductor TFT platform, the patent applies local quality adjustments by optimizing specific parameters (such as channel dimensions, electrode configurations, or gate insulating layer thickness) for different circuit functions. This allows driver circuits and pixel portions to have tailored characteristics while sharing the same manufacturing process foundation
Data Source
AI summary
The semiconductor device includes a driver circuit portion including a driver circuit and a pixel portion including a pixel. The pixel includes a gate electrode layer having a light-transmitting property, a gate insulating layer, a source electrode layer and a drain electrode layer each having a light-transmitting property provided over the gate insulating layer, an oxide semiconductor layer covering top surfaces and side surfaces of the source electrode layer and the drain electrode layer and provided over the gate electrode layer with the gate insulating layer therebetween, a conductive layer provided over part of the oxide semiconductor layer and having a lower resistance than the source electrode layer and the drain electrode layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer.