Oxide Semiconductor TFT Electrode Overlap for Etch Protection

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Solution Overview

Problem

The production of oxide semiconductor TFTs faces challenges due to damage from etchant during the etching process, leading to erosion and delamination issues, which complicates the production process and reduces TFT reliability.

Innovation Solution

The source and drain electrodes are designed to cover or be formed inside the perimeter of the gate electrode, preventing etchant seepage and residues from reaching the oxide semiconductor layer, thus protecting it during the etching process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If oxide semiconductor TFTs are produced using conventional etching processes, then source and drain electrodes can be formed, but etchant damages the oxide semiconductor layer causing erosion and delamination

Engineering Contradiction:
Improveetching processVSAvoidTFT reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The gate electrode is positioned to overlap the oxide semiconductor layer before etching begins, creating a protective configuration that prevents etchant damage during the etching process. This preliminary structural arrangement ensures the oxide semiconductor layer is shielded from etchant exposure that would otherwise cause erosion and delamination

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The gate electrode acts as an intermediary protective barrier between the etchant and the oxide semiconductor layer. By positioning the gate electrode to overlap the oxide semiconductor layer, it physically blocks etchant seepage and residues from reaching and damaging the oxide semiconductor layer during etching

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the oxide semiconductor layer is exposed during etching to allow electrode formation, then electrodes can be created, but the oxide semiconductor layer suffers erosion and delamination

Engineering Contradiction:
Improveproduction efficiencyVSAvoidoxide semiconductor layer integrity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The gate electrode is pre-positioned to overlap the oxide semiconductor layer before etching, establishing a protective configuration that allows etching to proceed without exposing the oxide semiconductor layer to damaging etchant contact, thus maintaining layer integrity while enabling electrode formation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The potential harmful effect of etchant exposure is converted into a beneficial protective mechanism. The gate electrode, which would normally be etched away, is instead used as a temporary protective shield during etching, converting the etching process itself into a method that protects rather than damages the oxide semiconductor layer

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS9035298B2Semiconductor device, TFT substrate, and method for manufacturing semiconductor device and TFT substrate
Publication Date: 2015.05.19 SHARP KK
  • US9035298B2 patent drawing
  • US9035298B2 patent drawing
  • US9035298B2 patent drawing

AI summary

A semiconductor device (100) according to the present invention is a semiconductor device having a thin film transistor (10), including: a gate electrode (12) of a thin film transistor (10); a gate insulating layer (13) formed on the gate electrode (12); an oxide semiconductor layer (15) disposed on the gate insulating layer (13); and a source electrode (17) and a drain electrode (18) formed on the oxide semiconductor layer (15). When viewed from a direction perpendicular to the substrate plane the semiconductor device (100), the source electrode (17) or the drain electrode (18) covers at least one of a plurality of sites at which the perimeter of the gate electrode (12) and the perimeter of the oxide semiconductor layer (15) intersect.