Oxide Thin Film Transistor Etch Stopper Protection
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Solution Overview
Problem
The existing methods for fabricating oxide thin film transistors face challenges such as damage to the back channel of the active layer during etching processes, which degrades the semiconductor characteristics and limits the scalability and performance of displays like LCDs and OLEDs, due to exposure to chemical materials and UV rays during photolithography.
Innovation Solution
A method involving the use of a ternary or quaternary system oxide semiconductor, specifically AxByCzO (A, B, C=Zn, Cd, Ga, In, Sn, Hf, Zr; x, y, z≧0), where additional insulating layers act as etch stoppers to protect the active layer, reducing exposure and maintaining carrier concentration stability, and employing dry etching with oxygen plasma to pattern these layers, thereby minimizing damage and enhancing uniformity and mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single etch stopper layer is used to protect the active layer, then the back channel is partially protected, but damage from chemical materials and UV rays during photolithography still occurs
Solution Approach 1:
The patent divides the protective structure into multiple etch stopper layers (first etch stopper layer and second etch stopper layer) positioned at different locations above the active layer. This segmentation provides comprehensive protection against chemical materials and UV rays during photolithography processes, preventing damage to the back channel region that cannot be achieved with a single etch stopper layer.
Solution Approach 2:
The patent extends the protection in the vertical dimension by stacking etch stopper layers at different heights above the active layer. The first etch stopper layer is positioned at a first height and the second etch stopper layer is positioned at a second height different from the first height, creating a multi-level protective structure that blocks harmful factors from reaching the active layer from multiple angles and depths.
2Temperature
If amorphous silicon thin film transistors are used, then low temperature fabrication is achieved, but mobility is very small and constant current bias conditions are not satisfied
Solution Approach 1:
The patent changes the material parameter of the active layer from amorphous silicon to oxide semiconductor material, which enables both low temperature fabrication and high mobility characteristics. The oxide semiconductor material inherently provides higher carrier mobility and satisfies constant current bias conditions while maintaining compatibility with low temperature processing techniques.
3Reliability
If polycrystalline silicon thin film transistors are used, then high mobility and constant current bias conditions are achieved, but uniform characteristics cannot be obtained and high temperature process is required
Solution Approach 1:
The patent changes the material parameter from polycrystalline silicon to oxide semiconductor material, which maintains high mobility and constant current characteristics while enabling low temperature fabrication. The oxide semiconductor material structure allows for amorphous or nanocrystalline formation at lower temperatures compared to polycrystalline silicon, achieving similar electrical performance without the high temperature requirement.
4Ease of manufacture
If oxide semiconductor is applied to typical bottom gate structure, then fabrication is simplified, but the oxide semiconductor is damaged during dry etching process using plasma
Solution Approach 1:
The patent applies preliminary protective action by forming etch stopper layers before the dry etching process. The first etch stopper layer is formed before patterning the source and drain electrodes, and the second etch stopper layer is formed before photolithography processes. This preliminary protection prevents plasma damage to the oxide semiconductor during these critical fabrication steps.
Solution Approach 2:
The etch stopper layers serve as intermediary protective barriers between the plasma etching environment and the oxide semiconductor active layer. These intermediate layers absorb or block the harmful effects of plasma and chemical materials, allowing the dry etching process to proceed without damaging the underlying oxide semiconductor material.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes damage to the back channel, maintains stable carrier concentration, and achieves high mobility and uniform characteristics, making the oxide thin film transistors suitable for large-scale displays and flexible electronics with improved performance and durability.
Implementation Method 1
employing dry etching with oxygen plasma to pattern these layers
Data Source
AI summary
A method for fabricating an oxide thin film transistor includes sequentially forming a gate insulating film, an oxide semiconductor layer, and a first insulating layer; selectively patterning the oxide semiconductor layer and the first insulating layer to form an active layer and an insulating layer pattern on the gate electrode; forming a second insulating layer on the substrate having the active layer and the insulating layer pattern formed thereon; and selectively patterning the insulating layer pattern and the second insulating layer to form first and second etch stoppers on the active layer. The oxide semiconductor layer may be a ternary system or quaternary system oxide semiconductor comprising a combination of AxByCzO (A, B, C=Zn, Cd, Ga, In, Sn, Hf, Zr; x, y, z≧0).