Oxide TFT Flat Panel Display Etch Stopper Design

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Solution Overview

Problem

The existing methods for fabricating flat panel display devices with oxide thin film transistors suffer from pin hole faults due to etch depth differences between the gate insulation film and the passivation layer, leading to disconnection of metal films in the contact hole regions.

Innovation Solution

The solution involves forming an auxiliary etch stopper under the data line in the pad contact region to prevent over-etching and pin hole faults, using a sequence of mask procedures to carefully form the channel layer, source and drain electrodes, and passivation layers, ensuring proper etch stoppers are in place to maintain the integrity of the data and link lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the gate insulation film and passivation layer are etched to form contact holes, then the data line and link line can be connected, but pin hole faults occur due to etch depth differences

Engineering Contradiction:
Improveconnection reliabilityVSAvoidetch depth control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming an auxiliary etch stopper layer in the pad contact region before forming the contact holes. This auxiliary etch stopper is positioned at a depth that prevents over-etching during subsequent contact hole formation processes. By preparing this protective structure in advance, the patent eliminates pin hole faults that would otherwise occur due to etch depth differences between the gate insulation film and passivation layer, thereby improving connection reliability without compromising manufacturing precision.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If additional mask procedures are added to prevent pin hole faults, then manufacturing precision improves, but device complexity increases

Engineering Contradiction:
Improvecontact hole formation precisionVSAvoidmask procedure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent introduces an auxiliary etch stopper layer as an intermediary structure that simplifies the overall fabrication process. Rather than adding multiple mask procedures to control etch depth, the auxiliary etch stopper acts as a physical mediator that automatically prevents over-etching. This intermediary structure is formed using existing process steps and materials, thereby improving contact hole formation precision without increasing device complexity or requiring additional mask procedures.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8853686B2Flat panel display device with oxide thin film transistor and method for fabricating the same
Publication Date: 2014.10.07 LG DISPLAY CO LTD
  • US8853686B2 patent drawing
  • US8853686B2 patent drawing
  • US8853686B2 patent drawing

AI summary

A flat panel display device with an oxide thin film transistor and a fabricating method thereof are disclosed. The fabricating method of the flat panel display device includes: preparing a substrate defined into a pixel region and a pad contact region; forming a gate electrode and a link line; forming a pixel electrode within the pixel region; forming an oxide layer on the substrate provided with the pixel electrode; forming a passivation layer on the substrate and performing a formation process of contact holes to expose the link line; and forming a second transparent conductive material film on the substrate.