Oxide TFT Etching Protection in Array Substrates

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Solution Overview

Problem

In the fabrication of thin film transistor liquid crystal displays (TFT-LCDs), the use of dry etching for source and drain metal layers in low temperature polysilicon TFTs can damage the active layer of oxide TFTs, leading to poor performance and reduced product yield due to erosion.

Innovation Solution

The method involves forming a gate of the oxide TFT in the same layer as the source and drain of the low temperature polysilicon TFT, with the source and drain of the oxide TFT being formed using wet etching, which separates and protects the active layer from damage during the etching process, and includes forming a source wiring and gate wiring connected through vias, allowing for accurate control of pixel openings and increased etching uniformity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If dry etching is used for source and drain metal layers in low temperature polysilicon TFTs, then the fabrication process can be completed, but the active layer of oxide TFTs is damaged leading to poor performance and reduced product yield

Engineering Contradiction:
Improvefabrication process completionVSAvoidproduct yield
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent divides the array substrate into distinct display area and peripheral area, and separates the etching processes into different types (wet etching for display area, dry etching for peripheral area). This segmentation allows each region to undergo the most appropriate etching method without compromising the other, thus protecting the oxide TFT active layer while completing the fabrication process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different etching methods to different regions: wet etching is used specifically in the display area where oxide TFTs are located to protect the active layer, while dry etching is used in the peripheral area for low temperature polysilicon TFTs. This local differentiation of etching quality ensures that each region receives the treatment most suitable for its specific requirements.

Inventive Principle:
Principle #3Local quality

2Productivity

If dry etching is used for source and drain metal layers, then the process can be completed efficiently, but the active layer of oxide TFTs suffers erosion leading to poor performance

Engineering Contradiction:
Improvefabrication efficiencyVSAvoidetching accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent segments the etching process into two distinct stages: wet etching for the display area source and drain metal layers, and dry etching for the peripheral area. This segmentation ensures that the precision-sensitive oxide TFT active layer is processed with the gentler wet etching method, while maintaining overall fabrication efficiency through the subsequent dry etching step in the peripheral area.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality control by applying wet etching specifically to the display area where high precision is required for oxide TFTs, and dry etching to the peripheral area where efficiency is prioritized. This localized approach to etching quality ensures that manufacturing precision is maintained where most critical while preserving overall productivity.

Inventive Principle:
Principle #3Local quality

3Device complexity

If the same etching method is used for both display area and peripheral area, then the process is simplified, but the active layer of oxide TFTs in the display area is damaged

Engineering Contradiction:
Improveetching process complexityVSAvoidactive layer integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent divides the array substrate into display area and peripheral area, and accordingly segments the etching process into wet etching for the display area and dry etching for the peripheral area. This segmentation increases process complexity but is necessary to protect the active layer integrity of oxide TFTs in the display area while still completing the fabrication of the entire array substrate.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different etching methods to different regions: wet etching for the display area to preserve active layer integrity, and dry etching for the peripheral area. This local differentiation of etching quality ensures that the active layer is protected where needed while maintaining overall device functionality.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces damage to the active layer of the oxide TFT, enhances product yield, and improves etching accuracy and uniformity, resulting in higher quality array substrates and display apparatuses with reduced power consumption.

Implementation Method 1

forming a source and a drain of the oxide TFT on the active layer of the oxide TFT by using wet etching

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS20200144301A1Array substrate, method for making the array substrate, and display apparatus
Publication Date: 2020.05.07 ORDOS YUANSHENG OPTOELECTRONICS
  • US20200144301A1 patent drawing
  • US20200144301A1 patent drawing
  • US20200144301A1 patent drawing

AI summary

This disclosure discloses an array substrate, a method for making the same, and a display apparatus. The array substrate comprises a display area and a peripheral area around the display area. The method comprises: forming an active layer of a low temperature polysilicon TFT in the peripheral area of the array substrate; forming a gate of a oxide TFT disposed in the same layer as a source and a drain of the low temperature polysilicon TFT in the display area of the array substrate, and forming an active layer of the oxide TFT electrically insulated from the gate of the oxide TFT above the gate of the oxide TFT; forming a source and a drain of the oxide TFT on the active layer of the oxide TFT.