Oxide TFT Light Shielding via Extended Gate Electrode
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Solution Overview
Problem
Current oxide thin film transistors (TFTs) using oxide semiconductors are prone to degradation due to light exposure, leading to reliability issues and threshold voltage shifts, especially when used in display devices with backlights or organic light emitting layers, as they are not adequately protected from scattered light.
Innovation Solution
The proposed solution involves designing an oxide TFT structure where the gate electrode has a larger line width than the active layer, and the source and drain electrodes fully cover the active layer to block direct light exposure, and incorporating a dummy color filter layer to absorb scattered light, thereby enhancing the reliability of the TFT.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If oxide TFT structure is used with conventional electrode configuration, then fabrication is simpler and cost is lower, but light exposure causes threshold voltage shifts and reliability degradation
Solution Approach 1:
The patent extends the gate electrode in the channel width direction beyond the conventional boundaries, creating an overlapping region with the active layer. This dimensional extension in the horizontal plane allows the gate electrode to function as a light shield, blocking scattered light from reaching the active layer while maintaining the simplicity of the oxide TFT fabrication process.
Solution Approach 2:
The gate electrode is given dual functionality: it continues to provide electrical control of the channel while simultaneously serving as a light shielding structure. This multi-functionality eliminates the need for separate light blocking structures, maintaining fabrication simplicity while improving reliability against light-induced threshold voltage shifts.
2Object-affected harmful factors
If gate electrode line width is increased to block light, then light shielding effect is improved, but device area increases
Solution Approach 1:
Instead of increasing the gate electrode width in the channel direction (which would affect device area), the patent extends the gate electrode in the channel width direction (perpendicular to current flow). This utilizes the unused space in the width dimension to provide light shielding without compromising the active channel area for current conduction.
Solution Approach 2:
The gate electrode is extended only in specific regions where light shielding is needed (overlapping the active layer in the width direction), while maintaining the original critical dimensions for electrical operation. This localized extension provides light shielding functionality without unnecessarily increasing the overall device footprint.
3Object-affected harmful factors
If source and drain electrodes fully cover active layer, then light exposure is blocked, but manufacturing precision requirements increase
Solution Approach 1:
The source and drain electrodes are extended to fully cover the active layer, serving dual purposes: electrical contact function and light shielding function. This multi-functionality improves reliability by blocking scattered light while the standard fabrication processes maintain acceptable alignment precision through established photolithography techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents light-induced degradation and threshold voltage shifts, improving the reliability of the oxide TFTs and enabling stable operation in display devices.
Implementation Method 1
incorporating a dummy color filter layer to absorb scattered light
Data Source
AI summary
There are provided an oxide TFT, a method for fabricating a TFT, an array substrate for a display device having a TFT, and a method for fabricating the display device. The oxide thin film transistor includes: a gate electrode formed on a substrate; a gate insulating layer formed on the entire surface of the substrate including the gate electrode; an active layer pattern formed on the gate insulating layer above the gate electrode and completely overlapping the gate electrode; an etch stop layer pattern formed on the active layer pattern and the gate insulating layer; and a source electrode and a drain electrode formed on the gate insulating layer including the etch stop layer pattern and the active layer pattern and spaced apart from one another, and overlapping both sides of the etch stop layer pattern and the underlying active layer pattern.