Oxide TFT Pad Area Protective Patterns for LCD Short Defects

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Solution Overview

Problem

LCD devices with oxide thin film transistors face short defects between signal lines in the pad area due to foreign substances during fabrication, leading to signal distortion and faults in the gate and data pad portions.

Innovation Solution

The implementation of protective patterns made from the same material as the channel layer of the oxide thin film transistor, interposed between signal lines in the pad area, prevents short defects by acting as a semiconductor layer and controlling the growth of insulation films.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If signal lines are arranged in the pad area without protective patterns, then device complexity is reduced, but short defects occur between signal lines due to foreign substances during fabrication

Engineering Contradiction:
Improveprevention of short defects between signal linesVSAvoidstructure of pad area
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A protective pattern made of oxide semiconductor material is introduced as an intermediary layer between crossing signal lines in the pad area. This protective pattern acts as a barrier that prevents foreign substances from causing short defects between the signal lines, while being formed using the same material and process as the channel layer of the oxide thin film transistor.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The protective pattern is formed in advance during the oxide thin film transistor fabrication process, specifically when the channel layer is being created. By preparing the protective pattern beforehand, the structure is ready to prevent short defects before the signal lines are fully assembled and before foreign substances could cause problems during subsequent fabrication steps.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If protective patterns are added to prevent short defects, then reliability improves, but manufacturing process complexity increases

Engineering Contradiction:
Improvesignal line integrityVSAvoidfabrication process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The protective pattern is merged with the channel layer formation process of the oxide thin film transistor. Both the channel layer and the protective pattern are formed from the same oxide semiconductor material using the same deposition and patterning processes, thereby integrating the protective function into the existing manufacturing flow without requiring entirely separate fabrication steps.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If insulation films are allowed to grow freely on signal lines, then manufacturing is simpler, but foreign substances cause short defects between crossing lines

Engineering Contradiction:
Improveprevention of short defectsVSAvoidcontrol of insulation film growth
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The protective pattern serves as an intermediary barrier that controls where insulation films can grow. By placing this oxide semiconductor layer between crossing signal lines, the growth of insulation films is naturally constrained and foreign substances are blocked from creating conductive paths between adjacent lines, thereby preventing short defects.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9847353B2Method of making liquid crystal display device with oxide thin film transistor
Publication Date: 2017.12.19 LG DISPLAY CO LTD
  • US9847353B2 patent drawing
  • US9847353B2 patent drawing
  • US9847353B2 patent drawing

AI summary

A method of making a display device includes, providing a substrate having a display area and a pad area in a periphery of the display area, the display area including a plurality of pixel regions; forming a thin film transistor having a channel layer on the substrate; arranging a gate link line and a first common voltage line to cross each other, and having a first insulation film be interposed therebetween; arranging a second common voltage line and a data link line to cross each other, and having second insulation film be interposed therebetween; disposing a first pattern on the first insulation film; and disposing a second pattern on the second insulation film, wherein the channel layer, the first pattern and the second pattern are formed of the same material.