Oxide TFT Array Substrate with Parallel Active Layers for Uniform Mobility

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Solution Overview

Problem

Current oxide TFTs with top gate electrode structures have limited mobility and poor device uniformity due to difficulties in controlling the thickness of double active layers, which fails to meet the requirements of high-resolution products.

Innovation Solution

A double-layer active layer structure connected in parallel with a double-layer gate electrode structure, where the first and second active layers are connected in parallel, allowing for common conduction and precise regulation of film thickness, improving device uniformity and electron mobility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a double active layer structure is used to improve mobility, then the mobility of oxide TFT is improved, but the thickness of each active layer is difficult to control and device uniformity is poor

Engineering Contradiction:
Improveelectron mobilityVSAvoidactive layer thickness control
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The invention divides the single active layer into two separate active layers (first active layer and second active layer), each with its own gate electrode. This segmentation allows independent thickness control of each active layer, solving the problem of difficult thickness control in double active layer structures while maintaining improved mobility through the parallel conduction path.

Inventive Principle:
Principle #1Segmentation

2Speed

If a double gate structure is used to improve mobility, then the mobility of oxide TFT is improved by 1.4 times, but the thickness control remains difficult and uniformity is poor

Engineering Contradiction:
Improveelectron mobilityVSAvoiddevice uniformity
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The invention segments the gate structure into two separate gate electrodes (first gate electrode and second gate electrode), each controlling a separate active layer. This allows independent optimization and control of each gate-active layer pair, achieving both mobility improvement and uniform device characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from a single-layer structure to a multi-layer stacked structure, adding the vertical dimension with separate active layers and gate electrodes. This dimensional change enables independent control of each layer's thickness and properties, improving both mobility and uniformity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If a top gate electrode structure is used, then the device structure is simple, but the mobility upper limitation is lower

Engineering Contradiction:
Improvegate electrode structureVSAvoidelectron mobility
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The invention adds a vertical stacking dimension with multiple active layers and gate electrodes, transforming the simple top-gate structure into a multi-layer structure. This dimensional change enables enhanced mobility through parallel conduction paths while maintaining reasonable structural complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The invention combines multiple active layers and gate electrodes into a single integrated device structure, where the first and second active layers conduct in parallel. This merging of multiple functional elements achieves enhanced mobility while keeping the overall device structure unified and manageable.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20240153959A1Array substrate and manufacturing method thereof, and display panel
Publication Date: 2024.05.09 SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
  • US20240153959A1 patent drawing
  • US20240153959A1 patent drawing
  • US20240153959A1 patent drawing

AI summary

An array substrate, a manufacturing method thereof, and a display panel are provided. The array substrate includes a stacked substrate, a first active layer, a first gate electrode, a second active layer, and a second gate electrode. The active layer includes a first channel portion opposite to the first gate electrode, the second active layer includes a second channel portion opposite to the second gate electrode. The first active layer and the second active layer are connected in parallel, and the first channel portion and the second channel portion are separately provided.