Oxide TFT Second Layer Reduces Parasitic Capacitance
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Solution Overview
Problem
In organic light emitting display devices, increased parasitic capacitance between scan and data lines leads to RC delay, degrading image quality due to the increased number of thin film transistors connected to each scan line, especially as panel resolution and size increase.
Innovation Solution
Incorporating a second oxide semiconductor layer between intersecting scan and data lines in an oxide TFT with an inverted staggered bottom gate structure, using materials like ZnO, which reduces parasitic capacitance and improves signal transmission efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of TFTs connected to each scan line is increased to achieve higher resolution, then the panel resolution is improved, but the RC delay in scan signals is increased
Solution Approach 1:
The patent applies local quality by forming a second oxide semiconductor layer specifically in the overlapping region between scan and data lines, rather than uniformly across the entire panel. This localized approach reduces parasitic capacitance precisely where it occurs (at line intersections) without affecting other regions, thereby reducing RC delay while maintaining high resolution performance.
2Area of stationary object
If the length of scan line is increased to accommodate larger panel size, then the panel size is increased, but the RC delay in scan signals is increased
Solution Approach 1:
The second oxide semiconductor layer is formed specifically in overlapping regions between scan and data lines throughout the large panel area. This localized treatment addresses RC delay at critical intersection points regardless of overall panel size, enabling large panels to maintain signal integrity without proportionally increasing RC delay across the entire scan line length.
3Reliability
If the parasitic capacitance between scan and data lines is increased, then the coupling between lines is enhanced, but the RC delay is increased
Solution Approach 1:
The patent changes the physical and electrical parameters in the overlapping region by introducing a second oxide semiconductor layer with specific material properties (such as ZnO with appropriate thickness and dielectric constant). This parameter change optimizes the balance between maintaining necessary signal coupling for reliable pixel operation and minimizing parasitic capacitance to reduce RC delay, achieving both reliability and speed requirements.
Data Source
AI summary
An organic light emitting display device including a plurality of scan lines arranged in a first direction, a plurality of data lines arranged in a second direction, the plurality of data lines intersecting with the plurality of scan lines, and pixels respectively disposed at intersection portions of the scan and data lines, each pixel including at least one thin film transistor (TFT) and an organic light emitting diode, wherein the TFT is an oxide TFT, the oxide TFT including a first oxide semiconductor layer as an active layer, and a second oxide semiconductor layer is disposed between intersecting scan and data lines.