Oxide Semiconductor Memory Cell for Power-Free Data Retention
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Solution Overview
Problem
Current semiconductor memory devices face challenges in retaining data without power, with volatile devices like DRAM requiring frequent refresh and high power consumption, and non-volatile devices like flash memory experiencing gate insulating layer deterioration and high voltage requirements.
Innovation Solution
A semiconductor device with a layered structure using an oxide semiconductor transistor and a conventional transistor, where the oxide semiconductor transistor has extremely low off current, allowing long-term data retention without power and enabling high-speed operation without the need for refresh or high voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a volatile memory device like DRAM is used to store data, then writing and reading operations can be performed quickly, but the device requires frequent refresh operations and consumes high power to retain data
Solution Approach 1:
The invention divides the memory device into two distinct transistor components: a first transistor for rapid data writing and reading operations, and a second transistor with extremely low off-current for long-term data retention. This segmentation allows each transistor to be optimized for its specific function, resolving the contradiction between speed and power consumption.
Solution Approach 2:
The gate electrode of the first transistor serves as an intermediary that connects both writing/reading operations and long-term data retention. By controlling the potential of this gate electrode, the device can rapidly write data and then maintain it without continuous power supply, eliminating the need for frequent refresh operations.
2Duration of action of stationary object
If a non-volatile memory device like flash memory is used to retain data without power, then data holding time is extremely long, but the gate insulating layer deteriorates after numerous writing operations and high voltage is required
Solution Approach 1:
The invention creates a functional copy of non-volatile memory behavior using the second transistor's extremely low off-current characteristic. Instead of using a traditional flash memory structure with floating gates that suffer from insulating layer deterioration, the patent uses the oxide semiconductor transistor to replicate the data retention function without the associated reliability problems.
Solution Approach 2:
The invention changes the material parameter of the transistor used for data retention from conventional semiconductor to oxide semiconductor. This material parameter change results in extremely low off-current (10^-21 to 10^-24 A), enabling long-term data retention without the high voltage requirements and insulating layer deterioration associated with flash memory.
3Use of energy by stationary object
If flash memory is used for data storage, then refresh operations are not needed, but complicated supplemental circuits are required to equalize the number of writing operations and the fundamental lifetime problem remains
Solution Approach 1:
The oxide semiconductor transistor in the second transistor component serves itself to maintain data retention without requiring external refresh operations or complex supplemental circuits. The extremely low off-current characteristic inherently provides long-term data holding capability, making the memory device self-sufficient for data retention.
4Speed
If conventional semiconductor transistors are used for high-speed operation, then writing and reading can be performed quickly, but the transistors have leakage current and require continuous power supply to maintain data
Solution Approach 1:
The invention applies local quality by using different transistor types in different locations within the same memory device. The first transistor uses conventional semiconductor material optimized for high-speed operation with acceptable leakage, while the second transistor uses oxide semiconductor material with extremely low off-current for energy-efficient data retention. Each location has the quality needed for its specific function.
Data Source
AI summary
Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.