Oxide Semiconductor Transistor for Nonvolatile Memory Retention
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Solution Overview
Problem
Current semiconductor devices, such as DRAM and flash memory, face limitations in data retention time, power consumption, and number of write cycles, with DRAM requiring frequent refresh operations and flash memory experiencing degradation due to tunneling current and high voltage needs.
Innovation Solution
A semiconductor device using a highly purified oxide semiconductor with a novel structure that includes transistors with extremely low leakage current, allowing for long-term data retention without the need for refresh operations and without limitations on the number of write cycles, achieved by optimizing the gate insulating layers and insulating layers to reduce off-state current and eliminate the need for high voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a DRAM is used to store data, then write operations are fast, but data retention time is short and refresh operations are needed frequently
Solution Approach 1:
The patent changes the material parameter of the transistor from conventional semiconductor to oxide semiconductor, which fundamentally alters the off-state current characteristics. This parameter change enables the transistor to maintain extremely low leakage current while allowing fast write operations, thus resolving the contradiction between write speed and data retention time
Solution Approach 2:
The patent uses a composite structure combining oxide semiconductor material with conventional semiconductor materials in the same device. The oxide semiconductor transistor serves as the storage element while other components use conventional materials, creating a hybrid device that achieves both fast operation and long data retention
2Duration of action of moving object
If a flash memory is used to store data, then data retention time is extremely long, but the gate insulating layer deteriorates after a predetermined number of write operations
Solution Approach 1:
The patent changes the operating voltage parameter from high voltage (needed in flash memory for tunneling current) to low voltage operation. This parameter change eliminates the tunneling current that causes gate insulating layer deterioration, allowing indefinite write cycles while maintaining long data retention through the oxide semiconductor's low leakage current
Solution Approach 2:
The patent converts the typically harmful tunneling current mechanism into a beneficial low-leakage mechanism by using oxide semiconductor properties. Instead of relying on high-voltage tunneling to store charge (which damages the insulator), the device uses the oxide semiconductor's inherent ability to trap charge at low voltages with minimal stress on the gate insulating layer
3Duration of action of moving object
If a flash memory is used to hold charge, then data retention is permanent, but high voltage is needed and write/erase operations are slow
Solution Approach 1:
The patent changes the voltage parameter from high voltage to low voltage operation, and changes the charge storage mechanism from tunneling-based to depletion-layer-based. This enables fast write operations comparable to DRAM while achieving permanent data retention through the oxide semiconductor's ability to maintain charge in the depletion region without refresh
4Duration of action of moving object
If an SRAM is used to store data, then no refresh operation is needed, but cost per storage capacity increases
Solution Approach 1:
The patent extracts the charge storage function from the transistor itself by utilizing the oxide semiconductor's unique ability to maintain charge in its depletion region. This eliminates the need for separate capacitor structures required in DRAM or complex flip-flop circuits in SRAM, achieving simplified device structure with non-volatile storage capability
Solution Approach 2:
The oxide semiconductor transistor serves multiple functions simultaneously: it acts as the switching transistor, the charge storage element, and the data retention mechanism all in one component. This multi-functionality eliminates the need for separate storage capacitors or complex logic circuits, reducing device complexity while achieving SRAM-like no-refresh operation with permanent retention
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device achieves extended data retention, reduced power consumption, and increased integration with no limitations on write cycles, enabling high-speed operations and improved reliability by utilizing oxide semiconductors with low off-state current and eliminating the need for high voltage.
Implementation Method 1
A transistor formed using an oxide semiconductor has extremely low leakage current; therefore, data can be retained for a long time.
Implementation Method 2
A DRAM stores data in such a manner that a transistor included in a storage element is selected and electric charge is stored in a capacitor.
Data Source
AI summary
A semiconductor device with a novel structure in which stored data can be retained even when power is not supplied, and does not have a limitation on the number of write cycles. The semiconductor device includes a memory cell including a first transistor, a second transistor, and an insulating layer placed between a source region or a drain region of the first transistor and a channel formation region of the second transistor. The first transistor and the second transistor are provided to at least partly overlap with each other. The insulating layer and a gate insulating layer of the second transistor satisfy the following formula: (ta/tb)×(∈ra/∈rb)<0.1, where ta represents the thickness of the gate insulating layer, tb represents the thickness of the insulating layer, ∈ra represents the dielectric constant of the gate insulating layer, and ∈rb represents the dielectric constant of the insulating layer.