Oxidized Tungsten-Silicon Capacitor Structure for Low-Parasitic Transistors

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Solution Overview

Problem

Existing transistors face challenges in miniaturization, high parasitic capacitance, low frequency characteristics, unstable electrical properties, and high off-state current, which hinder their integration and performance in semiconductor devices.

Innovation Solution

A capacitor structure is introduced with a first conductor made of tungsten and silicon, overlapped by a second conductor with a silicon oxide film as the insulator, and integrated with a transistor to reduce parasitic capacitance and enhance electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional transistor structures are used, then manufacturing is simpler, but parasitic capacitance increases and frequency characteristics deteriorate

Engineering Contradiction:
Improvefrequency characteristicsVSAvoidtransistor structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The transistor structure is divided into multiple functional regions including a first conductor region, a second conductor region, and an insulator region with specific overlapping relationships. This segmentation allows reduction of parasitic capacitance while maintaining manufacturability through defined spatial zones.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces vertical stacking of conductor and insulator regions to create three-dimensional overlapping structures. This dimensional approach reduces parasitic capacitance by separating electrical paths in the vertical dimension while maintaining planar footprint for integration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of moving object

If transistor size is reduced for miniaturization, then integration density improves, but electrical characteristics and stability worsen

Engineering Contradiction:
Improvetransistor areaVSAvoidelectrical characteristics stability
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The insulator region is nested within the overlapping area of the first and second conductor regions, creating a compact structure where the insulator is positioned to specifically reduce parasitic capacitance without increasing the overall transistor footprint.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent optimizes the thickness and material composition of the insulator region, and the overlapping dimensions of conductor regions, to achieve reduced parasitic capacitance while maintaining stable electrical characteristics in miniaturized transistors.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If conventional capacitor structures are used, then manufacturing is simpler, but parasitic capacitance increases affecting transistor performance

Engineering Contradiction:
Improvecapacitor structure complexityVSAvoidparasitic capacitance
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The capacitor structure is merged with the transistor structure by forming the first conductor, second conductor, and insulator region as an integrated unit. This merging eliminates separate capacitor components and their associated parasitic capacitances while maintaining the capacitive function within the transistor structure.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a miniaturized transistor with low parasitic capacitance, high frequency characteristics, stable electrical properties, and low off-state current, enabling high-speed operation and integration in semiconductor devices.

Implementation Method 1

the insulator includes a silicon oxide film formed by oxidizing the first conductor

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS12446302B2Method for forming capacitor, semiconductor device, module, and electronic device
Publication Date: 2025.10.14 SEMICON ENERGY LAB CO LTD
  • US12446302B2 patent drawing
  • US12446302B2 patent drawing
  • US12446302B2 patent drawing

AI summary

A miniaturized transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A transistor having a large amount of on-state current is provided. A semiconductor device including the transistor is provided. A semiconductor device with high integration is provided. A novel capacitor is provided. The capacitor includes a first conductor, a second conductor, and an insulator. The first conductor includes a region overlapping with the second conductor with the insulator provided therebetween. The first conductor includes tungsten and silicon. The insulator includes a silicon oxide film that is formed by oxidizing the first conductor.