Oxygen-Treated CESL Contacts for Leakage Isolation in Semiconductors

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Solution Overview

Problem

As semiconductor devices continue to shrink in size, increased leakage currents between closely spaced features degrade device performance and reliability, necessitating innovative solutions to mitigate these issues.

Innovation Solution

The formation of a treated layer in the contact etch stop layer (CESL) and contact spacers through an oxygen-based treatment within recesses, using oxygen-containing gases, forms a protective barrier against leakage currents while maintaining structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature sizes are reduced to increase integration density, then more components can be integrated into a given area, but leakage currents between closely spaced features increase

Engineering Contradiction:
Improveintegration densityVSAvoidleakage current
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A contact etch stop layer (CESL) is introduced as an intermediary layer between the interlayer dielectric and the conductive contacts. This CESL layer acts as a mediator that provides electrical isolation and prevents leakage currents between closely spaced conductive features, enabling higher integration density without compromising reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The CESL is selectively formed only in specific regions where conductive contacts are located, providing localized electrical isolation where it is most needed. This local application of the isolation layer prevents leakage currents at critical interfaces while maintaining the overall device structure and enabling continued scaling

Inventive Principle:
Principle #3Local quality

2Productivity

If conventional etching is used without oxygen-based treatment, then the etching process is simpler and faster, but leakage currents occur between closely spaced features

Engineering Contradiction:
Improveetching speedVSAvoidelectrical isolation
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

An oxygen-based treatment is performed on the CESL and contact spacers before the final etching step. This preliminary oxidation treatment modifies the surface properties of these layers, creating a protective barrier that prevents leakage currents during subsequent processing and device operation, while maintaining etching efficiency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The oxygen-based treatment changes the chemical and physical parameters of the CESL and contact spacer surfaces, transforming them into oxidized states that provide better electrical isolation. This parameter change enables the structure to resist leakage currents without significantly impacting the etching process speed

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves electrical isolation between conductive features, enhancing device performance and reliability, contributing to the evolution of semiconductor technology.

Implementation Method 1

performing a treatment in the recess to form a treated layer in the first CESL

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS20260006872A1Semiconductor devices using oxygen-based treatment during etching
Publication Date: 2026.01.01 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260006872A1 patent drawing
  • US20260006872A1 patent drawing
  • US20260006872A1 patent drawing

AI summary

An embodiment is a method including forming a first interlayer dielectric (ILD) over a transistor structure, forming first conductive contacts through the first ILD to the transistor structure, and forming a first contact etch stop layer (CESL) over the first conductive contacts and the first ILD. The method may include forming a second ILD over the first CESL. Moreover, the method may include forming a second conductive contact through the second ILD, the first CESL, and first ILD to the transistor structure. The method may also include etching a recess into the second ILD and the first CESL. Furthermore, the method may include performing a treatment in the recess to form a treated layer in the first CESL. Additionally, the method may include forming a first conductive feature in the recess, the first conductive feature being electrically coupled to the first conductive contacts.