PCRAM Sidewall Insulator Reduces Reset Current
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Manufacturing high-density memory devices with phase change based materials faces challenges in reducing the size of contacts and achieving tight specifications for large-scale production, leading to increased reset current and power consumption.
Innovation Solution
A phase change random access memory (PCRAM) device design featuring a sidewall insulating member with small contact areas and a bridge of programmable resistive material between electrodes, reducing thermal dissipation and current requirements by concentrating current flow and improving thermal isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the size of contact areas between electrodes and phase change material is reduced, then current density increases and reset current magnitude decreases, but manufacturing precision requirements increase and thermal isolation improves
Solution Approach 1:
The patent transitions from planar contacts to three-dimensional vertically-aligned nanoscale contacts through sidewall spacer formation. This vertical dimension enables precise contact area control via spacer thickness while maintaining small horizontal footprints, resolving the contradiction between small contact area and manufacturing precision
Solution Approach 2:
The patent controls contact area by adjusting spacer layer thickness parameters rather than relying solely on lithographic patterning. This parameter-based control through atomic layer deposition enables precise and repeatable contact area definition, addressing the manufacturing precision challenge while achieving small contact areas
2Use of energy by moving object
If the size of phase change material element is reduced, then current density increases and reset current decreases, but device complexity increases
Solution Approach 1:
The patent segments the memory device into distinct functional layers (dielectric layer, conductive layer, spacer layer, memory material layer) with clearly defined interfaces. This segmentation enables precise control of the phase change material size while maintaining manufacturing simplicity through standard semiconductor fabrication processes
Solution Approach 2:
The patent introduces spacer layers as intermediary structures that mediate between the electrodes and the phase change material. These spacers serve as self-aligned masks and dimensional controllers, simplifying the overall device fabrication while enabling precise control of the small phase change material element dimensions
3Loss of energy
If contact area is reduced for lower reset current, then thermal isolation improves, but manufacturing difficulty increases
Solution Approach 1:
The patent employs self-aligned spacer formation where the spacer layers automatically position themselves relative to the electrodes and memory material through conformal deposition. This self-alignment eliminates the need for additional alignment steps and complex lithographic patterning, making the manufacturing of small thermal-isolated contacts straightforward and scalable
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a significant reduction in reset current and power consumption while maintaining high density, making it suitable for large-scale integrated circuits with improved manufacturing feasibility.
Implementation Method 1
Phase change based memory materials, like chalcogenide based materials and similar materials, can also be caused to change phase by application of electrical current at levels suitable for implementation in integrated circuits. The generally amorphous state is characterized by higher resistivity than the generally crystalline state
Implementation Method 2
The change from crystalline to amorphous, referred to as reset herein, is generally a higher current operation, which includes a short high current density pulse to melt or breakdown the crystalline structure
Implementation Method 3
The magnitude of the reset current needed for reset can be reduced by reducing the size of the phase change material element in the cell and of the contact area between electrodes and the phase change material, so that higher current densities are achieved with small absolute current values through the phase change material element
Implementation Method 4
The magnitude of the reset current needed for reset can be reduced by reducing the size of the phase change material element in the cell and of the contact area between electrodes and the phase change material
Data Source
AI summary
A method for manufacturing a memory device comprises patterning a dielectric layer and a conductive layer to align near the center of the top surface of a first contact drain plug and near the center of the top surface of a second contact drain plug. A first electrode is formed on the right sidewalls of the patterned dielectric layer and the conductive layer. A sidewall insulating member has a first sidewall surface and a second sidewall surface where the first sidewall surface of the sidewall insulating member is in contact with a sidewall of the first electrode. A second electrode is formed by depositing an electrode layer overlying the top surface of the sidewall insulating member and the second sidewall of the insulating member and isotropically etching the electrode layer to form the second electrode.