P-well Isolation for NAND Memory Program Disturb
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Solution Overview
Problem
As memory-cell size is scaled down, program disturb becomes a significant issue due to increased natural variation in cell-to-cell programming behavior, making it difficult to prevent fast programming cells from inadvertently programming inhibited cells, while high channel-boost voltage increases V_inhibit disturb.
Innovation Solution
The implementation of a program-inhibit scheme using P-well isolation, where P-wells of inhibited strings are biased while those of selected strings are held at ground, reducing the likelihood of voltage disturbance and allowing for increased channel-boost voltage without V_inhibit disturb.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If channel-boost voltage is increased to reduce program disturb, then program disturb is reduced, but V_inhibit disturb increases
Solution Approach 1:
The patent divides the memory device into separate P-well regions for selected strings and inhibited strings. This segmentation allows independent voltage control of each group, enabling high channel-boost voltage for selected cells without causing V_inhibit disturb to inhibited cells.
Solution Approach 2:
The patent applies different voltage conditions to different spatial regions: selected P-wells receive high channel-boost voltage while inhibited P-wells maintain low V_inhibit voltage. This local differentiation resolves the contradiction by allowing high voltage benefits locally without global harmful effects.
2Quantity of substance
If memory-cell size is scaled down to increase density, then storage capacity increases, but program disturb increases due to natural variation
Solution Approach 1:
The patent segments the memory device into independently controllable P-well regions for selected and inhibited strings. This enables separate voltage optimization for each segment, allowing aggressive scaling for capacity while maintaining reliability through localized voltage control that compensates for natural variation.
Solution Approach 2:
The patent dynamically changes voltage parameters (channel-boost voltage and V_inhibit) based on the operational state (selected vs. inhibited). This parameter adjustment compensates for natural variation in scaled-down cells, maintaining program reliability despite increased density and associated variability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces program disturb by preventing voltage disturbance between selected and inhibited strings, enabling better control over programming and scaling of NAND memory cells.
Implementation Method 1
P-well isolation, where P-wells of inhibited strings are biased while those of selected strings are held at ground, reducing the likelihood of voltage disturbance
Implementation Method 2
Flash memory commonly uses Fowler-Nordheim tunneling for programming memory cells. The tunneling current is dependent on the voltage gap between the control gate and a channel region.
Data Source
AI summary
A memory device and a method to prevent or reduce program disturb by isolating P-wells of strings in a non-volatile memory array. During a program operation, the isolated P-wells may be coupled to corresponding bitlines, which may be selected or inhibited, and may be at different voltages. During erase, read, and verify operations, the isolated P-wells may be coupled to source.