Adaptive PA Bias Circuit for Millimeter-Wave Compression Control
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Solution Overview
Problem
In millimeter wave 5G communications systems, existing techniques for enhancing power amplifier efficiency face challenges due to high frequency and bandwidth, and techniques like envelope tracking have performance issues.
Innovation Solution
An adaptive bias circuit for power amplifiers that dynamically adjusts bias voltage based on input signal amplitude, using a configuration of transistors and resistors to increase the 1 dB compression point and saturated output power, while reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If envelope tracking is used to enhance power amplifier efficiency in lower bandwidth systems, then power amplifier efficiency is improved, but performance issues occur in 5G millimeter-wave applications due to high frequency and bandwidth requirements
Solution Approach 1:
The bias circuit dynamically adjusts the bias voltage level based on the instantaneous amplitude of the input signal. The circuit continuously monitors the input signal envelope and modifies the bias voltage accordingly, transitioning from static to dynamic operation to maintain optimal efficiency across varying signal conditions in millimeter-wave applications
Solution Approach 2:
The invention changes the bias voltage parameter dynamically rather than using fixed biasing. By varying the bias voltage level in response to input signal amplitude changes, the circuit adapts its operating point to maintain efficiency while meeting the demanding performance requirements of millimeter-wave frequencies and bandwidths
2Use of energy by moving object
If adaptive biasing is implemented to improve efficiency during low output power delivery, then power consumption is reduced, but circuit complexity increases
Solution Approach 1:
The bias circuit is self-regulating and automatically adjusts its output based on the input signal characteristics without requiring external control logic or complex processing. The circuit uses the input signal itself to control the bias voltage generation, eliminating the need for separate sensing and control circuits that would increase complexity
Solution Approach 2:
The invention combines the bias generation function with the signal processing function in a single integrated circuit. The bias circuit processes the input signal envelope and generates the appropriate bias voltage simultaneously, merging multiple functions into one compact structure to minimize additional complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The adaptive bias circuit improves output referred 1 dB compression point and saturated output power, reducing amplitude to amplitude distortion and power consumption, especially during low output power delivery.
Implementation Method 1
a first transistor having its drain terminal and its gate terminal connected to a first circuit node and its source terminal connected to a first supply terminal... a first resistor connected between the first circuit node and a second circuit node
Implementation Method 2
a second transistor configured to receive a first component of a differential input signal to the PA at its gate terminal. The second transistor has its drain terminal connected to the second circuit node... a third transistor configured to receive a second component of the differential input signal to the PA at its gate terminal
Implementation Method 3
The bias circuit is configured to generate a bias voltage for the PA at the second circuit node... a first resistor connected between the first circuit node and a second circuit node
Data Source
AI summary
A bias circuit for a PA. A first transistor has its drain terminal and its gate terminal connected to a first circuit node and its source terminal connected to a first supply terminal, a first current source connected to the first circuit node, and a first resistor connected between the first and second circuit nodes. A second transistor receives a first component of a differential input signal to the PA at its gate terminal, has its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal, and a third transistor receives a second component of the differential input signal to the PA at its gate terminal, having its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal. The gates terminals of the second and the third transistors are biased by a first voltage.