Package Device De-Warpage Layer for Precise Layer Alignment
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Solution Overview
Problem
During the fabrication of package devices through a redistribution layer process, the alternation of circuit and isolation layers leads to stress-induced warping, resulting in misalignment and non-uniformity of the layers, which affects the quality of the final product.
Innovation Solution
Incorporating a de-warpage layer between the circuit and isolation layers to mitigate stress and balance internal stresses, thereby reducing warpage and improving alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If circuit layers and isolation layers are alternately formed during redistribution layer process, then package devices can be fabricated with multiple circuit and isolation layers, but stress is generated between adjacent layers causing warpage and misalignment
Solution Approach 1:
A de-warpage layer is introduced as an intermediary component between the circuit layer and isolation layer. This de-warpage layer acts as a stress buffer that absorbs and distributes the internal stress generated during the alternation of circuit and isolation layers, preventing warpage and maintaining layer alignment without interfering with the multi-layer fabrication process
2Adaptability or versatility
If multiple circuit and isolation layers are formed alternately, then functional integration is improved, but internal stress causes warpage reducing manufacturing consistency
Solution Approach 1:
The de-warpage layer changes the stress distribution parameters within the multi-layer structure. By introducing this intermediate layer with different mechanical properties, the internal stress parameters are modified to prevent warpage, thereby maintaining manufacturing consistency while preserving the functional integration benefits of multiple alternating layers
Data Source
AI summary
A package device is provided and includes a first circuit layer, a first isolation layer, and a first de-warpage layer. The first circuit layer and the first isolation layer are stacked on each other. At least a portion of the first de-warpage layer is disposed between the first circuit layer and the first isolation layer.