Package-on-Package IC with Central Bond Wire Routing

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Solution Overview

Problem

The challenge in integrated circuit packaging is to reduce the size and height of stacked semiconductor packages while minimizing wire sagging and electrical contact issues, as well as to increase density without increasing the occupied area on the substrate, which is limited by the space for mounting semiconductor dice and the length of bonding wires.

Innovation Solution

The solution involves a base substrate with a central opening, where a bottom die is attached below the substrate and a top die is attached above, with external conductive interconnections exposed and encapsulated, using a low-viscosity adhesive to embed bond wires and reduce the overall height of the package.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bonding wires are extended laterally to reach different areas on the substrate, then electrical connectivity is improved, but the occupied area on the substrate increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidoccupied area on substrate
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from lateral wire extension in the horizontal plane to vertical wire routing through the substrate thickness dimension. Bond wires are routed from the first substrate surface through the substrate to the second substrate surface, utilizing the third dimension (height) to achieve connectivity without increasing footprint area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If wire loops are adapted in elevation to allow lateral extension, then electrical connectivity is improved, but the height or thickness of the stacked package increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidpackage height
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent extracts the wire loop structure from the vertical elevation space and replaces it with direct vertical wire routing through the substrate. By removing the elevated loop configuration, the patent achieves electrical connectivity while minimizing the height occupation of the stacked package.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If multiple chips are stacked in a single package structure, then operational performance and memory capacity are improved, but wire sagging and short circuit risks increase

Engineering Contradiction:
Improveoperational performanceVSAvoidwire stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent routes bond wires vertically through the substrate thickness dimension rather than allowing them to sag horizontally between chips. This vertical routing through the substrate provides structural support and prevents wire sagging and short circuiting while maintaining the stacked package configuration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS7687920B2Integrated circuit package-on-package system with central bond wires
Publication Date: 2010.03.30 STATS CHIPPAC MANAGEMENT PTE LTD
  • US7687920B2 patent drawing
  • US7687920B2 patent drawing
  • US7687920B2 patent drawing

AI summary

An integrated circuit package-on-package system includes: providing a base substrate having a central opening; attaching a bottom die below the base substrate partially covering the central opening, the bottom die connected through the central opening to a top surface of the base substrate; attaching a top die above the base substrate partially covering the central opening; attaching external conductive interconnections to a base bottom surface of the base substrate; and molding an encapsulant leaving the external conductive interconnections partially exposed.