Microelectronic Package Shielding With Conductive Pillars for EMI Isolation
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Solution Overview
Problem
Existing methods for protecting microelectronic elements from electromagnetic interference (EMI) and radio frequency interference (RFI) in microelectronic devices are time-consuming, costly, and prone to defects, especially when using wires or solid conductive walls, and can disrupt flip chip interconnect processes.
Innovation Solution
The use of conductive pillars coupled to a conductive trace in the substrate, surrounded by dies, with a trench filled with conductive material to provide EMI and RFI shielding, allowing for flexible and efficient encapsulation and reduced processing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If wires are used to provide EMI and RFI protection around microelectronic elements, then shielding effectiveness is improved, but manufacturing time increases and mechanical reliability deteriorates due to wire fragility
Solution Approach 1:
The continuous conductive shield is segmented into discrete conductive pillars positioned around the microelectronic element. This segmentation allows the shield to be formed using standard flip chip interconnect processes rather than requiring separate wire bonding steps, thereby reducing manufacturing time while maintaining shielding effectiveness.
Solution Approach 2:
The conductive pillars are merged with the existing flip chip interconnect structure, combining the shielding function with the electrical interconnection function. This integration eliminates the need for separate wire bonding operations, reducing both manufacturing time and process complexity.
2Object-affected harmful factors
If wires are used to provide EMI and RFI protection around microelectronic elements, then shielding effectiveness is improved, but mechanical reliability deteriorates due to wire fragility
Solution Approach 1:
The invention replaces fragile wires with robust conductive pillars formed from conductive material deposited during the flip chip process. These pillars are inherently more mechanically reliable than wires as they are rigid structures integrated into the substrate, eliminating the fragility issues associated with wire-based shielding.
3Object-affected harmful factors
If a solid conductive wall is used to provide EMI and RFI protection, then shielding effectiveness is improved, but encapsulation quality deteriorates due to unbalanced pressure and defects
Solution Approach 1:
The solid conductive wall is segmented into discrete conductive pillars with spacing between them. This segmentation allows encapsulation material to flow through the gaps during the molding process, preventing unbalanced pressure and encapsulation defects such as voids and un-fill, while still maintaining effective EMI and RFI shielding.
4Object-affected harmful factors
If wire stitching is added to provide EMI and RFI protection in flip chip interconnect, then shielding effectiveness is improved, but device complexity increases due to extra steps and tooling
Solution Approach 1:
The shielding function is merged with the existing flip chip interconnect process by forming conductive pillars using the same conductive material deposition and patterning steps. This integration eliminates the need for separate wire bonding tooling and process steps, thereby reducing device complexity while achieving effective shielding.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces processing time and costs, enhances mechanical robustness, improves assembly yield, and provides effective shielding without the need for wire stitching, while allowing for flexible package design and reduced moisture ingress.
Implementation Method 1
conductive pillars that are coupled to a conductive trace exposed in a substrate... provide EMI and/or RFI shielding between the two dies
Data Source
AI summary
A microelectronic device may include a substrate, a first chip on the substrate, and a second chip on the substrate. A plurality of pillars may be located between the first chip and the second chip, wherein a first end of each pillar of the plurality of pillars is adjacent to the substrate. A spacing among the plurality of pillars is at least equal to a distance sufficient to block electromagnetic interference (EMI) and/or radio frequency interference (RFI) between the first chip and the second chip. The microelectronic device may also include a cover over at least the first chip, the second chip, and the plurality of pillars, wherein a second end of each pillar of the plurality of pillars is at least adjacent to a trench defined within the cover. The trench may include a conductive material therein.