Package Substrate Cavity for Embedded Power Components
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Solution Overview
Problem
Traditional power-delivery approaches in semiconductor packaging face challenges with large components, including increased PCB form factor, inefficient power delivery, surface mount technology (SMT) challenges, and the need for recess formation, which lead to prohibitive costs and component spacing issues.
Innovation Solution
A unique cavity is formed in the package substrate's first dielectric layer, partially bounded by solder resist, to accommodate large components like inductors and capacitors, eliminating the need for surface mounting and associated SMT challenges, while enabling tighter component placement and reducing Z-height.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If large components are attached on the PCB surface using standard paste print, then power delivery efficiency is improved, but surface mount technology challenges increase and form factor increases
Solution Approach 1:
The patent merges the component attachment process with the PCB manufacturing process by forming cavities during substrate fabrication. Large power delivery components are placed into these cavities and encapsulated with additional dielectric material, integrating them seamlessly into the PCB structure rather than attaching them separately on the surface.
Solution Approach 2:
The patent transitions from surface-mounted component attachment to embedded component placement by creating cavities within the substrate thickness. Components are positioned in the third dimension (depth) rather than only on the surface plane, utilizing vertical space to reduce form factor while maintaining component functionality.
2Loss of energy
If large components are attached on the PCB surface, then power delivery efficiency is improved, but PCB form factor increases
Solution Approach 1:
The patent embeds large power delivery components within cavities formed in the PCB substrate, nesting them inside the board structure rather than placing them on the external surface. This nesting approach allows components to occupy internal volume rather than external area, reducing the overall PCB form factor.
Solution Approach 2:
The solution moves component placement from the two-dimensional surface to the three-dimensional internal volume of the PCB. By utilizing the thickness dimension and creating embedded cavities, the design accommodates large components without increasing the PCB's planar footprint.
3Ease of manufacture
If components are attached by standard paste print, then attachment is achieved, but manufacturing precision challenges increase due to solder paste spreading
Solution Approach 1:
The patent performs preliminary actions by forming precise cavities and placing components into them before final encapsulation. The cavity structure pre-defines the exact component position and limits solder paste movement, eliminating the precision control issues that occur with standard surface paste printing methods.
Solution Approach 2:
The patent segments the attachment process into distinct steps: cavity formation, component placement into the confined cavity space, and encapsulation. This segmentation allows each step to be optimized independently, with the cavity providing natural boundaries that prevent solder paste spreading issues.
4Adaptability or versatility
If components are attached on the back side of the package substrate, then component placement flexibility is improved, but recess formation is required increasing manufacturing complexity
Solution Approach 1:
The patent performs preliminary cavity formation during the substrate manufacturing process itself, before component placement. This preliminary action creates ready-to-receive cavities that eliminate the need for separate recess formation steps after substrate fabrication, reducing overall manufacturing complexity.
Solution Approach 2:
The patent merges cavity formation with the substrate manufacturing process, combining what would otherwise be separate operations. The cavities are formed as part of the lamination and fabrication sequence, integrating the preparation step with the base manufacturing rather than requiring additional post-processing.
Data Source
AI summary
A package substrate is disclosed. The package substrate includes a substrate core, a cavity below the substrate core that extends from a surface of a first resist layer to a bottom surface of the package substrate, and a first terminal and a second terminal in the first resist layer. The package substrate also includes one or more passive components that are coupled inside the cavity to the first terminal and the second terminal.