Package Substrate Structure for Fine Pitch and Warpage Balance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing package substrates face challenges in responding to fine pitches, maintaining balance to minimize warpage, improving connection reliability, and managing the embedding depth of circuit patterns, which affects design freedom and thermal conductivity.
Innovation Solution
A package substrate with a novel structure featuring insulating layers, outer circuit patterns, connection portions, and seed metal layers, allowing for direct formation of connection portions on circuit patterns and post bumps, which enhances bonding strength and thermal conductivity while balancing upper and lower portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the circuit line width is miniaturized to several micrometers or less, then the degree of circuit integration is increased, but the manufacturing precision and reliability deteriorate due to etching loss
Solution Approach 1:
Instead of forming copper patterns on the surface and etching them (conventional method), the patent embeds copper foil within the insulating layer. This inverts the traditional approach by placing the conductive material inside rather than on the surface, eliminating etching loss and enabling fine pitch circuits with improved reliability
Solution Approach 2:
The copper foil is embedded in the insulating layer before subsequent processing steps. This preliminary embedding action prevents circuit loss during etching by having the copper already protected within the insulating matrix before any pattern formation occurs
2Length of moving object
If connection portions are formed with small dimensions for fine pitch, then the pitch is reduced, but the bonding strength and thermal conductivity deteriorate
Solution Approach 1:
The patent applies different dimensions to different connection portions based on their functional requirements. First connection portions have smaller dimensions for fine pitch, while second connection portions have larger dimensions for enhanced bonding strength and thermal conductivity. This local differentiation allows each connection portion to be optimized for its specific purpose
Solution Approach 2:
The connection portions are segmented into two distinct types: first connection portions for fine pitch applications and second connection portions for high strength/thermal performance. This segmentation allows the system to simultaneously achieve both fine pitch capability and adequate bonding strength by distributing different connection types to different locations
3Ease of manufacture
If the upper and lower portions of the circuit board are unbalanced, then the manufacturing is simplified, but warpage occurs
Solution Approach 1:
The patent intentionally creates asymmetric structures on both the upper and lower surfaces of the circuit board. By disposing connection portions and devices differently on each side, the design achieves asymmetric balance that compensates for potential warpage, maintaining structural stability while allowing manufacturing flexibility
4Adaptability or versatility
If the embedding depth of circuit patterns is not managed, then the design freedom is reduced, but the manufacturing complexity increases
Solution Approach 1:
The patent manages the embedding depth of circuit patterns as a controlled parameter. By specifying that copper foil is embedded at a particular depth within the insulating layer, the design achieves consistency across different implementations while maintaining flexibility in overall device design. This parameter control enables repeatable manufacturing without sacrificing design freedom
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables fine pitch capability, reduced warpage, improved connection reliability, and enhanced thermal conductivity, facilitating efficient heat dissipation and design flexibility.
Implementation Method 1
the first connection portion may be formed by electroplating the seed metal layer formed for the electroplating of the first circuit pattern as the seed layer
Data Source
AI summary
A package substrate according to an embodiment includes an insulating layer; a first outer circuit pattern disposed on an upper surface of the insulating layer; a second outer circuit pattern disposed under a lower surface of the insulating layer; a first connection portion disposed on an upper surface of a first-first circuit pattern of the first outer circuit pattern; a first contact portion disposed on the first connection portion; a first device disposed on the first connection portion through the first contact portion; a second contact portion disposed under a lower surface of a second-first circuit pattern of the second outer circuit pattern; a second device attached to the second-first circuit pattern through the second contact portion; and a second connection portion disposed under a lower surface of a second-second circuit pattern of the second outer circuit pattern; wherein the first connection portion is disposed with a first width and a first interval, and wherein the second connection portion is disposed with a second width greater than the first width and a second interval greater than the first interval.