Semiconductor Package Underfill and Encapsulation for Void-Free Bonding

Solution Overview

Problem

Existing semiconductor packages face issues with bonding performance deterioration due to voids formed between the die and interposer around the chamfer portion, leading to delamination and high thermal expansion coefficients, which affect package integrity and stiffness.

Innovation Solution

The space between the die and interposer is filled with a polymeric material having smaller fillers, lower viscosity, and higher thixotropic index to prevent void formation, followed by encapsulation with a polymeric material having larger fillers and higher viscosity to enhance bonding and stiffness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a polymeric material with larger fillers and higher viscosity is used to encapsulate the die, then package stiffness is enhanced, but void formation occurs in the space between the die and interposer around the chamfer portion

Engineering Contradiction:

Improvepackage stiffnessVSAvoidbonding performance

Core Design Contradiction:

StrengthVSReliability

Solution Approach 1:

The encapsulation process is divided into two distinct stages: first filling the space between die and interposer with a low-viscosity material, then encapsulating with a high-viscosity material. This segmentation allows each material to perform its specific function optimally without compromise.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the viscosity and filler size parameters of the polymeric material between two sequential steps. The first material has lower viscosity and smaller fillers for void-free filling, while the second material has higher viscosity and larger fillers for stiffness enhancement.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If a polymeric material with lower viscosity is used to fill the space between die and interposer, then void formation is prevented, but package stiffness is reduced

Engineering Contradiction:

Improvebonding performanceVSAvoidpackage stiffness

Core Design Contradiction:

ReliabilityVSStrength

Solution Approach 1:

The encapsulation process is divided into two distinct stages: first filling the space between die and interposer with a low-viscosity material, then encapsulating with a high-viscosity material. This segmentation allows each material to perform its specific function optimally without compromise.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the viscosity and filler size parameters of the polymeric material between two sequential steps. The first material has lower viscosity and smaller fillers for void-free filling, while the second material has higher viscosity and larger fillers for stiffness enhancement.

Inventive Principle:

Principle #35Parameter changes

3Ease of manufacture

If voids are present at the bonding interface, then filling is simplified, but delamination and high coefficient of thermal expansion occur

Engineering Contradiction:

Improvefilling processVSAvoidpackage integrity

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent performs a preliminary filling action first to eliminate voids at the bonding interface before performing the main encapsulation. This preliminary step ensures proper bonding performance and prevents delamination while maintaining manufacturing efficiency.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach improves bonding performance and package stiffness by ensuring void-free filling and robust encapsulation, thereby enhancing the structural integrity of semiconductor packages.

Implementation Method 1

The space between the die and interposer is filled with a first polymeric material with smaller filler size, lower viscosity and/or higher thixotropic index

Methodology Applied

Scientific EffectCapillary action: Capillary Action

Implementation Method 2

a first polymeric material with smaller filler size, lower viscosity and/or higher thixotropic index

Methodology Applied

Scientific EffectThixotropy: Thixotropy

Data Source

PatentUS20250364393A1Semiconductor package and method of forming the same

Publication Date: 2025.11.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor package includes an interposer, a semiconductor die and a first polymeric material. The interposer has an interposer bonding structure thereon, and a sidewall of the interposer bonding structure is flush with a sidewall of the interposer. The semiconductor die has a die bonding structure thereon, and a sidewall of the die bonding structure is recessed from a sidewall of the semiconductor die. The semiconductor die is bonded to interposer through the die bonding structure and the interposer bonding structure. The first polymeric material is disposed in a non-bond region between the semiconductor die and the interposer, and encompassed by the semiconductor die, the die bonding structure and the interposer bonding structure. The porosity of the first polymeric material is less than about 20% in the non-bond region between the semiconductor die and the interposer.