Electronic Component Package With Via Conductors For High-Frequency Stability
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Solution Overview
Problem
As electronic devices integrate and shrink, the increased number of narrow wiring conductors for high-frequency signal transmission makes connection difficult, leading to challenges in impedance matching and maintaining electrical properties.
Innovation Solution
The electronic component package design includes a substrate with a frame and input/output member featuring via conductors and a ground layer, which reduces the line width and interval between wiring conductors, stabilizing high-frequency characteristics and allowing for size reduction while maintaining impedance matching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of wiring conductors is increased for integration enhancement, then the functionality and connectivity are improved, but the interval between wiring conductors must be narrowed and line width reduced, making connection difficult and electrical properties difficult to maintain
Solution Approach 1:
The patent transitions from planar wiring conductors to three-dimensional via conductors that extend vertically through the substrate. This dimensional change allows wiring conductors to be stacked in multiple layers, increasing connectivity without narrowing intervals in the planar view, thus maintaining manufacturing precision while achieving integration enhancement.
Solution Approach 2:
The patent implements nested via conductors where smaller diameter via conductors are positioned inside or alongside larger diameter via conductors. This nesting allows multiple signal paths to be packed within a compact vertical space, increasing the number of wiring conductors without reducing the interval between outer conductors, thereby maintaining connection precision.
2Volume of moving object
If the line width of wiring conductors is reduced for size reduction, then the package size is decreased, but connection of wiring conductors to electronic components becomes difficult and electrical properties become difficult to maintain
Solution Approach 1:
The patent uses vertical via conductors instead of horizontal planar conductors. The via conductors extend through the substrate thickness, providing substantial electrical connection length without increasing the planar footprint. This allows package size reduction while maintaining reliable electrical properties through the extended vertical path length.
Solution Approach 2:
The patent employs via conductors with composite structures including conductive materials filled in insulating material, or multi-layer conductive compositions. These composite via conductors provide both mechanical strength for reliable connection and controlled electrical characteristics, maintaining electrical properties even when planar dimensions are reduced for size reduction.
3Volume of moving object
If narrow line width wiring conductors are used, then size reduction is achieved, but characteristic impedance in connection parts becomes higher than desired value, making impedance matching difficult
Solution Approach 1:
The patent controls the diameter and wall thickness parameters of via conductors to precisely adjust characteristic impedance. By varying these dimensional parameters, the impedance of narrow via conductors can be matched to desired values despite reduced package size, achieving impedance matching precision through parameter optimization rather than increased size.
4Productivity
If the interval between wiring conductors is narrowed for integration enhancement, then the number of conductors per unit area increases, but connection difficulty increases and electrical properties become difficult to maintain
Solution Approach 1:
The patent arranges via conductors in vertical stacks through multiple substrate layers, achieving high integration density in the vertical dimension rather than compressing conductors horizontally. This maintains adequate intervals between via conductors in each layer while achieving high productivity through multi-layer stacking, and preserves electrical properties through sufficient spacing.
Data Source
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AI summary
An electronic component containing package (1) includes a substrate (2) including a placement region (R) for placing an electronic component (11) in an upper face thereof; a frame (3) disposed on the upper face of the substrate (2) surrounding the placement region (R), and including a penetration part (H) opened inward and outward; and an input/output member (5) disposed in the frame (3) closing the penetration part (H), including a plurality of wiring conductors (4) which extend inward and outward of the frame (3) and are electrically connected to the electronic component (11). The input/output member (5) includes via conductors (51) which are connected to the wiring conductors (4) and embedded at sites overlapping with the wiring conductors (4) within a region surrounded by the frame (3) in the input/output member (5), and a ground layer (52) disposed in a surrounding of lower ends of the via conductors (51) being spaced from the via conductors (51). Improved high frequency characteristics can be achieved.