Packaging Substrate Conductive Pillars Alignment Accuracy
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Solution Overview
Problem
Conventional semiconductor packaging substrates face issues with alignment accuracy, thermal stress, and bonding reliability due to the formation of wing structures and limited spacing between conductive pads, which affect the yield and reliability of the packaging substrate.
Innovation Solution
A packaging substrate design featuring conductive pillars with varying widths and a method involving photo-lithography and etching to form these pillars on the substrate, eliminating the wing structure and allowing for closer contact points, along with insulating protective layers to enhance exposure and bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a solder mask with openings is used to expose conductive pads (SMD method), then the conductive pads can be electrically connected to copper bumps, but the alignment accuracy is limited (≤12.5 μm) causing wing structure formation and increased spacing requirements
Solution Approach 1:
The patent extracts the solder mask layer from the conventional SMD process and replaces it with a resist layer that is removed after copper bump formation. This eliminates the alignment dependency between the solder mask openings and conductive pads, allowing the resist opening to be larger than the conductive pad without causing wing structure formation. The solder mask is completely removed or selectively removed to expose the copper bumps for soldering.
Solution Approach 2:
The patent performs the copper bump formation process before removing the solder mask or resist layer. By forming copper bumps first through electroplating on exposed conductive pads, then removing the protective layer, the process ensures precise electrical connection before the final soldering step. This sequence allows for better control of bump formation and reduces alignment constraints.
2Reliability
If copper bumps are formed by electroplating on exposed conductive pads, then electrical connection is achieved, but the wing structure formation reduces bonding reliability and causes thermal stress
Solution Approach 1:
The patent removes the solder mask layer after copper bump formation to eliminate the wing structure that causes thermal stress. By completely removing or selectively removing the solder mask from around the copper bumps, the design eliminates the source of differential thermal expansion between the wing structure and the substrate, preventing crack formation during temperature cycling tests.
Solution Approach 2:
The patent changes the material composition and structural parameters of the bump region by replacing the conventional solder mask-wing structure with a resist-removed structure. This parameter change eliminates the harmful thermal expansion differential, improving reliability under thermal cycling conditions while maintaining electrical connectivity.
3Manufacturing precision
If the diameter of solder mask openings is reduced to match conductive pad size, then alignment tolerance is reduced, but the spacing between pads cannot be reduced below 130 μm
Solution Approach 1:
The patent extracts and removes the solder mask layer after copper bump formation, allowing the resist opening diameter to be larger than the conductive pad diameter without creating wing structures. This enables reduced spacing between conductive pads (below 130 μm) while maintaining proper alignment tolerance, as the resist layer provides the necessary protection during bump formation and is subsequently removed.
4Reliability
If the insulating protective layer covers the conductive pads, then protection is provided, but exposure for bonding is limited
Solution Approach 1:
The patent forms copper bumps on exposed conductive pads first, while the solder mask or resist layer remains in place for protection. After copper bump formation, the solder mask is removed to expose the copper bumps for the final soldering process. This preliminary action sequence maintains protective coverage during critical formation steps while enabling exposure when needed for bonding.
Solution Approach 2:
The patent segments the protective layer function by using a resist layer for temporary protection during copper bump formation, then removing it to expose the bumps for soldering. Alternatively, the solder mask is selectively removed from specific regions. This segmentation allows the protective layer to serve multiple functions at different process stages without compromising either protection or exposure requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves alignment accuracy, reduces thermal stress, and enhances bonding reliability, enabling finer pitch and multi-joint connections while maintaining substrate integrity.
Implementation Method 1
A resist layer 12 is formed on the insulating protective layer 11, and has a plurality of openings 120 exposing the conductive pads 100 by exposure and development methods
Implementation Method 2
copper bumps 13 are formed by electroplating on the openings 120 such that the conductive pads 100 are electrically connected to the copper bumps 13
Data Source
AI summary
A packaging substrate is provided, including a substrate body and conductive pillars. The substrate body has a first surface and a second surface opposite to the first surface. The first surface has a plurality of first conductive pads, and the second surface has a die attach area and a peripheral area surrounding the die attach area. The die attach area has a plurality of second conductive pads embedded therein, wherein top surfaces of the second conductive pads are exposed from the second surface, and the die attach area of the second surface is fully exposed. The conductive pillars are correspondingly disposed on the second conductive pads and have first ends and opposite second ends. The first ends are closer than the second ends from the second conductive pads, and the first ends have a width bigger than a width of the second ends. A fabricating method thereof is also provided.