Packet-Based OTP Memory Layout for Fault-Tolerant Data Loading
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Solution Overview
Problem
Existing integrated circuits (ICs) face challenges in efficiently storing and managing one-time programmable (OTP) memory data due to process variations and varying performance parameters across different temperature conditions, requiring robust fault-tolerant mechanisms for both single and multiple data insertions.
Innovation Solution
The IC incorporates a packet-based OTP memory system that supports multiple fault-tolerant types, such as ECC and TMR, allowing for data compaction and de-compaction by storing data as packets with headers and payloads, and uses a controller to verify integrity based on different fault-tolerant types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple fault-tolerant mechanisms (ECC and TMR) are implemented for different data insertion scenarios, then data integrity and reliability are improved, but device complexity increases
Solution Approach 1:
The patent changes the parameter of fault-tolerance approach by selecting between ECC (error correction code) and TMR (triple modular redundancy) based on the data insertion scenario. ECC is used for single data insertion where space efficiency is prioritized, while TMR is used for multiple data insertions where robustness against multiple failures is needed. This parameter-based selection resolves the contradiction by matching the complexity of the fault-tolerant mechanism to the specific reliability requirements of each scenario.
Solution Approach 2:
The patent applies different fault-tolerant mechanisms to different locations or scenarios within the OTP memory system. Instead of using a single uniform approach, ECC is applied locally to single-insertion data paths while TMR is applied to multiple-insertion data paths. This local differentiation allows each subsystem to have the appropriate level of complexity for its specific reliability needs, resolving the overall system contradiction.
2Productivity
If packet-based storage with headers and payloads is used, then memory organization and data management efficiency are improved, but device complexity increases
Solution Approach 1:
The patent segments OTP memory data into structured packets with distinct headers and payloads. Each packet is further divided into word sections, with the header containing metadata (such as data type indicators) and the payload containing the actual data. This segmentation improves data management efficiency by enabling targeted processing and verification of specific packet components, while the structured format actually simplifies control logic compared to unorganized storage approaches.
3Reliability
If data is stored as packets with fault-tolerant signatures, then data integrity verification is improved, but memory space requirements increase
Solution Approach 1:
The patent applies fault-tolerant signatures partially, only to the necessary portions of data based on the insertion scenario. For single data insertions, ECC signatures provide adequate protection with minimal overhead. For multiple data insertions, TMR signatures are applied but only to the extent needed for that specific scenario. This partial application of fault-tolerance mechanisms resolves the contradiction by providing sufficient integrity verification without unnecessarily increasing memory space requirements for all data.
Data Source
AI summary
A one-time programmable (OTP) memory may be coupled to an OTP memory controller. The OTP memory controller may be configured to store OTP data in a packet format within the OTP memory. Data within the OTP packets may identify respective indices, where each of those indices may correspond to a configuration register or other volatile memory location. The data may be written to the OTP memory during a manufacturing process. During a boot or a reset, the OTP memory controller, in conjunction with a boot loader, may read out data from the OTP memory and cause that data to be written to locations in volatile memory according to the respective indices. After the data has been written to volatile memory, the data may be used to affect a trim of a component, support memory repair techniques, be used as a security key, etc.