Packet Processor Declarative Description Transformation

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Solution Overview

Problem

Designing packet processors is complex due to difficulties in specifying the required functionality and timing characteristics such as throughput and latency, making it challenging to efficiently process packets in communication networks.

Innovation Solution

Transforming a first declarative description of a packet processor into a second declarative description by flattening rules with guard conditions, enabling and disabling actions, and partitioning them into independent clusters to simplify the pipeline implementation, ultimately generating a hardware description language (HDL) for hardware pipeline implementation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If traditional methods are used to specify packet processing functionality and timing characteristics, then complete functionality can be achieved, but the design process becomes difficult and time consuming

Engineering Contradiction:
Improveease of specifying packet processing functionalityVSAvoiddesign time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The patent segments the packet processing functionality into distinct rules with guard conditions, where each rule represents a specific processing action. This segmentation allows designers to specify complex packet processing behavior through modular, manageable rule sets rather than monolithic specifications, significantly reducing design complexity and time

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary transformation process that converts high-level declarative rule specifications into detailed hardware implementation descriptions. This intermediary layer automatically handles the complex translation from functional requirements to hardware architecture, eliminating time-consuming manual design efforts while preserving complete functionality

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If multiple actions are included in rules with guard conditions, then processing flexibility is improved, but rule complexity increases

Engineering Contradiction:
Improveprocessing flexibilityVSAvoidrule complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent employs dynamic rule evaluation where guard conditions are assessed at runtime to determine which actions should be executed. This dynamic approach allows the system to handle multiple actions within rules flexibly based on actual packet characteristics, achieving high adaptability while keeping the rule structure manageable through automated evaluation logic

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The rule system is designed to be self-evaluating, where guard conditions automatically determine action execution without external intervention. This self-service mechanism reduces the perceived complexity for designers, as the system autonomously resolves conflicts and determines processing paths, allowing flexible multi-action rules to be specified without proportionally increasing design burden

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8160092B1Transforming a declarative description of a packet processor
Publication Date: 2012.04.17 XILINX INC
  • US8160092B1 patent drawing
  • US8160092B1 patent drawing
  • US8160092B1 patent drawing

AI summary

Methods are provided for transforming a declarative description of a processor of the packets of a communication protocol. A first declarative description of the packet processor is input. The first declarative description includes rules that include actions for manipulating the fields of the packets. Each rule includes one or more of the actions, and at least one of the rules includes multiple actions and a guard condition for enabling and disabling some of these actions. The first declarative description is transformed into a second declarative description of the packet processor. The second declarative description includes rules for manipulating the fields of the packets, and each rule corresponds to an action of a rule of the first declarative description. In addition, each individual action of each rule of the first declarative description corresponds to a rule of second declarative description that includes the individual action. The second declarative description is output.