Direct Pad-Bonded Semiconductor Packaging for Heat and Power Loss
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Solution Overview
Problem
Conventional semiconductor devices face high power consumption due to signal transmission through solder balls and long metal wires, and poor heat dissipation and reliability due to the use of bridge elements and organic packaging substrates with uneven stress.
Innovation Solution
The semiconductor device employs direct bonding of pads using conductive materials and metal-to-metal bonding, with dielectric layers made of silicon oxide and silicon nitride to balance stress, reducing transmission paths and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bridge element and organic packaging substrate are used for signal exchange, then signal transmission between chips is enabled, but heat dissipation becomes difficult and stress uniformity deteriorates
Solution Approach 1:
The patent extracts and removes the bridge element and organic packaging substrate from the signal transmission path. Instead, chips are directly bonded to the circuit substrate through solder balls, eliminating the intermediate bridge structure that caused heat dissipation issues and stress non-uniformity.
Solution Approach 2:
The patent transitions from a vertical stacked architecture (chips-bridge-element-organic substrate) to a planar direct-bonding architecture (chips-solder balls-circuit substrate). This dimensional reorganization shortens signal transmission paths and improves heat dissipation by eliminating thermal bottlenecks in the vertical stack.
2Reliability
If bridge element and organic packaging substrate are used for signal exchange, then signal transmission between chips is enabled, but stress uniformity and device yield deteriorate
Solution Approach 1:
The patent removes the organic packaging substrate known for poor flatness and stress concentration issues. By directly bonding chips to the rigid circuit substrate, the system eliminates the compliant but uneven organic layer that caused non-uniform stress distribution.
Solution Approach 2:
The patent employs a composite bonding structure combining solder balls for electrical connection with direct chip-to-substrate bonding for mechanical stability. This composite approach ensures both electrical functionality and uniform stress distribution across the device.
3Reliability
If solder balls and long metal wires are used for signal transmission, then electrical connection between chips is achieved, but power consumption increases
Solution Approach 1:
The patent extracts and eliminates the long metal wires and bridge element from the signal path. By implementing direct chip-to-chip bonding through solder balls, the signal transmission path is minimized, reducing resistive losses and power consumption.
Solution Approach 2:
The patent reorganizes the signal transmission architecture from a lengthy vertical path through bridge elements to a short direct path between chips. This dimensional optimization minimizes the length of conductive paths, thereby reducing I²R losses and overall power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves high performance and low cost by minimizing power consumption and improving heat dissipation while maintaining reliability.
Implementation Method 1
The second pad is bonded to the first pad through a conductive material
Implementation Method 2
the third pad is directly bonded to the fourth pad
Implementation Method 3
a material of one of the first dielectric layer and the second dielectric layer includes silicon oxide, and a material of other one of the first dielectric layer and the second dielectric layer includes silicon nitride
Data Source
AI summary
A semiconductor device includes a circuit substrate, a first semiconductor element, a second semiconductor element, and a connection element. The circuit substrate includes a first pad. The first semiconductor element is disposed on the circuit substrate and includes a second pad and a third pad. The second semiconductor element is disposed on the circuit substrate. The connection element is disposed on the circuit substrate and electrically connects the first semiconductor element and the second semiconductor element. The connection element includes a fourth pad. The second pad is bonded to the first pad through a conductive material, and the third pad is directly bonded to the fourth pad.