Pad-Integrated Capacitor Structure for Stable Power in Smaller Chips

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Solution Overview

Problem

In semiconductor chip design, adding a capacitor structure to stabilize power and signal ends increases chip area and costs, as traditional methods involve placing capacitors in spare spaces, which is inefficient and can lead to increased size and reduced film formation quality.

Innovation Solution

A semiconductor structure with a pad structure and a capacitor structure where the capacitor is disposed between the substrate and the pad, arranged in parallel, comprising multiple capacitor units connected in parallel, allowing for efficient use of space and improved film formation quality, thereby stabilizing power supply without increasing chip area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional capacitor placement in spare spaces is used, then capacitor function is achieved, but chip area increases and film formation quality deteriorates

Engineering Contradiction:
Improvepower supply stabilityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The capacitor structure is merged with the pad structure by positioning the capacitor directly below the pad, utilizing the same vertical space. This integration allows the capacitor to share the pad's connection pathways and reduces the need for separate capacitor placement areas, thereby achieving power supply stabilization without increasing chip area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The invention transitions from horizontal placement of capacitors in spare spaces to vertical stacking beneath the pad structure. By utilizing the vertical dimension below the pad, the capacitor is positioned in previously underutilized space, effectively reducing the horizontal chip area occupied while maintaining the capacitor's electrical function.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If traditional capacitor placement in spare spaces is used, then capacitor function is achieved, but film formation quality deteriorates

Engineering Contradiction:
Improvecapacitor reliabilityVSAvoidfilm formation quality
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The capacitor fabrication process is merged with the existing pad fabrication process. By forming the capacitor structure using the same film deposition and patterning steps as the pad, the invention ensures consistent film formation quality across both structures. This unified manufacturing approach eliminates the quality degradation associated with separate capacitor fabrication in spare spaces.

Inventive Principle:
Principle #5Merging (Combining)

3Stability of the object's composition

If multiple capacitors are added to stabilize power and signal ends, then operation stability is improved, but device complexity increases

Engineering Contradiction:
Improveoperation stabilityVSAvoidcapacitor structure complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The pad structure is designed to serve dual functions: as an electrical connection terminal and as a support structure for the underlying capacitor. This multi-functionality eliminates the need for separate capacitor components and their associated complex interconnections, thereby maintaining operation stability while reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12040352B2Semiconductor structure
Publication Date: 2024.07.16 CHANGXIN MEMORY TECH INC
  • US12040352B2 patent drawing
  • US12040352B2 patent drawing
  • US12040352B2 patent drawing

AI summary

A semiconductor structure includes: a pad structure disposed above a substrate; and a capacitor structure which is disposed between the substrate and the pad structure, is arranged to be opposite to the pad structure, and includes at least two capacitor units connected in parallel and spaced apart from each other, each of the capacitor units includes at least one capacitor device.