Page Buffer Circuit Stabilizing Voltage Accuracy
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Solution Overview
Problem
Variations in threshold voltages of bit line selection transistors in NAND-type flash EEPROMs lead to reduced voltage accuracy during data read-out, affecting the reliability of data retrieval.
Innovation Solution
A page buffer circuit utilizing a switched capacitor circuit is introduced, which includes capacitors, transistors, and control switches to stabilize and sample data voltages, reducing variations in threshold voltages and improving data read-out accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional page buffer circuits are used with bit line selection transistors, then data can be read out from memory cells, but variations in threshold voltages of the selection transistors reduce voltage accuracy
Solution Approach 1:
A switched capacitor circuit is introduced as an intermediary between the bit line selection transistor and the data read-out path. The capacitor samples and holds the voltage from the bit line, isolating the voltage measurement from the threshold voltage variations of the selection transistor. This mediator (capacitor) transfers the voltage signal while blocking the harmful threshold variations from affecting the final read-out accuracy.
Solution Approach 2:
The patent replaces the direct transistor-based voltage transfer mechanism with a capacitor-based voltage sampling mechanism. Instead of relying on the transistor to directly pass the voltage signal (which is affected by threshold variations), the system uses capacitive coupling to sample and hold the voltage, substituting the transistor's voltage transfer function with a capacitor's voltage storage function that is insensitive to transistor parameter variations.
2Measurement precision
If the precharge/discharge period is extended to improve data read-out accuracy, then voltage stability improves, but operation speed decreases
Solution Approach 1:
The switched capacitor circuit performs preliminary sampling and holding of the bit line voltage before the actual read-out operation. By pre-charging the capacitor to the correct voltage level and holding it stable during the read-out process, the circuit eliminates the need for extended precharge/discharge periods. The preliminary action of voltage sampling and holding prepares the signal in advance, ensuring stability without extending the overall operation time.
Solution Approach 2:
The patent introduces dynamic control of the capacitor charging and discharging cycles through controlled switching. The switch dynamically connects and disconnects the capacitor from the bit line at precise moments, allowing the capacitor to rapidly charge to the correct voltage and then hold it stable. This dynamic switching mechanism achieves voltage stability much faster than static precharge circuits, improving operation speed while maintaining accuracy.
Data Source
AI summary
A page buffer circuit includes a latch circuit that temporarily stores data when data is written in or read out from a memory cell through a bit line, the page buffer circuit is configured using a switched capacitor circuit. The page buffer circuit includes a first capacitor connected to a sense terminal connected to one end of the latch circuit, a second capacitor connected to the bit line, a first switch interposed between the sense terminal and the second capacitor, a second switch interposed between the sense terminal and a supply voltage, a first transistor including a control terminal and a first element terminal connected to both terminals of the first switch in parallel, a second transistor including first and second element terminals connected between a second element terminal of the first transistor and a ground, and a control circuit controlling the first and second switches and the second transistor.