Page Buffer Precharge Voltage Stability
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Solution Overview
Problem
Semiconductor memory devices face challenges in maintaining stable power voltage during sensing node precharge operations, leading to core voltage drops and inefficiencies in precharging processes.
Innovation Solution
The implementation of a page buffer with a sensing node and a bit line controller that uses multiple precharge current paths to gradually precharge the sensing node to a second potential level, improving voltage stability and reducing core voltage drops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single precharge current path is used to precharge the sensing node, then the precharge operation is simple, but the core voltage drops significantly during the precharge process
Solution Approach 1:
The precharge operation is divided into two distinct phases: a first precharge operation that precharges the sensing node to a first potential level, and a second precharge operation that precharges the sensing node to a second potential level. This segmentation allows the system to manage current draw more effectively, preventing significant core voltage drops while still completing the precharge function.
2Speed
If the sensing node is precharged to a high potential level quickly, then the precharge speed is fast, but the power supply stability deteriorates
Solution Approach 1:
The precharge operation is implemented as a periodic two-stage process. The first precharge operation raises the sensing node potential to an intermediate level, and the second precharge operation raises it further to the final potential level. This periodic, staged approach prevents sudden large current draws that would destabilize the power supply, while still achieving the required precharge speed through efficient sequential operations.
Data Source
AI summary
The present technology relates to a page buffer and a semiconductor memory device including the page buffer. The page buffer includes a sensing node, a bit line controller connected between the sensing node and a bit line. The bit line controller is configured to first precharge and second precharge the sensing node.