Page Buffer Read Control for Wordline Current Variation

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Solution Overview

Problem

Existing non-volatile memory devices face challenges in maintaining the reliability of stored data due to variations in wordline charging currents caused by varying states of memory cells, which can lead to degradation and reduced data integrity.

Innovation Solution

A non-volatile memory device with a control logic circuit that detects wordline charging currents during a preset detection time, adjusting bitline voltage and connection signals based on detection values and reference values to compensate for cell current variations, thereby enhancing data reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wordline setup operation is performed without detecting charging current, then operation speed is maintained, but data reliability deteriorates due to current variations

Engineering Contradiction:
Improvedata reliabilityVSAvoidoperation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The control logic circuit performs a detection operation before the main wordline setup operation to measure the charging current. This preliminary action allows the system to obtain current variation data without interfering with the subsequent normal operation, thereby improving reliability while maintaining operational simplicity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system detects the actual charging current during wordline setup and uses this feedback information to adjust the setup time or voltage levels. This closed-loop control ensures that data reliability is maintained by adapting to real-time current conditions, resolving the contradiction between reliability and operational simplicity.

Inventive Principle:
Principle #23Feedback

2Reliability

If wordline setup time is extended to detect charging current, then data reliability improves, but operation speed deteriorates

Engineering Contradiction:
Improvedata reliabilityVSAvoidoperation speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The charging current detection is performed as a preliminary action before the main wordline setup operation. By measuring the current in advance and storing it for later reference, the system can adjust setup parameters without extending the actual setup time, thus maintaining both reliability and speed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of continuously monitoring current throughout the entire setup process, the system performs detection during a specific partial time window (preset detection time) and uses this partial data to adjust the overall setup operation. This approach achieves reliability improvement without significant speed penalty.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If bitline voltage is adjusted without current detection, then device complexity is reduced, but data reliability deteriorates

Engineering Contradiction:
Improvedata reliabilityVSAvoidcontrol complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The control logic circuit uses the detected charging current as feedback to dynamically adjust bitline voltage levels and setup times. This feedback mechanism allows the system to adapt to current variations and maintain data reliability without requiring complex hardware modifications, resolving the contradiction between reliability and control complexity.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system changes operational parameters (bitline voltage, setup time) based on the detected charging current characteristics. By adjusting these parameters dynamically rather than using fixed values, the system achieves higher reliability while keeping the control logic relatively simple, as the adjustments are made through parameter modification rather than complex control circuits.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20260073996A1Non-volatile memory device and operating method thereof
Publication Date: 2026.03.12 SAMSUNG ELECTRONICS CO LTD
  • US20260073996A1 patent drawing
  • US20260073996A1 patent drawing
  • US20260073996A1 patent drawing

AI summary

Provided are a non-volatile memory device and an operating method thereof. The non-volatile memory device includes a memory cell array comprising a plurality of memory cells connected to a plurality of wordlines and a plurality of bitlines, a page buffer unit comprising page buffers connected to the plurality of memory cells through the plurality of bitlines, and a control logic circuit configured to output at least one control signal to the page buffer unit for performing a read operation based on a read command and an address, the read operation comprising a wordline setup operation, a pre-charge operation, a develop operation, and a sensing operation. The control logic circuit is configured to detect a wordline charging current, adjust at least one of a bitline voltage control signal set after the wordline setup operation and a bitline connection control signal during the develop operation.