Page Buffer Reference Voltage Circuit Without External HV Generation
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Solution Overview
Problem
Existing page buffers require external high voltage generation circuits to generate reference voltages for memory operations, which increases complexity and area requirements.
Innovation Solution
The page buffer internally generates reference voltages using integrated circuits, reducing the need for external high voltage generation circuits and minimizing area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external high voltage generation circuits are used to generate reference voltages, then reference voltage generation is achieved, but device complexity and area requirements increase
Solution Approach 1:
The patent merges the reference voltage generation function into the page buffer circuit itself by integrating a voltage divider circuit composed of a first resistor and a second resistor. This eliminates the need for separate external high voltage generation circuits, thereby reducing device complexity while maintaining reference voltage generation capability. The bit line voltage control circuit now performs dual functions: bit line voltage control and reference voltage generation.
Solution Approach 2:
The page buffer circuit is designed to perform multiple functions using the same components. The bit line voltage control circuit not only controls bit line voltage but also generates reference voltages for sensing operations. The first and second resistors form a voltage divider that generates reference voltages during read operations, demonstrating multi-functionality that reduces overall device complexity.
2Reliability
If external high voltage generation circuits are used, then reference voltages can be generated, but area requirements increase
Solution Approach 1:
The reference voltage generation circuit is merged within the page buffer structure using a compact voltage divider implementation. The first resistor and second resistor are integrated into the existing bit line voltage control circuit, eliminating the need for separate external high voltage generation circuits and thereby reducing the overall buffer area.
Solution Approach 2:
The voltage divider circuit for reference voltage generation is nested within the bit line voltage control circuit. The first and second resistors are positioned and connected within the existing circuit layout, allowing the reference voltage generation function to be embedded without increasing the overall buffer area.
3Area of stationary object
If internal reference voltage generation is implemented, then area requirements are reduced, but circuit integration complexity increases
Solution Approach 1:
The patent merges the reference voltage generation function into the existing bit line voltage control circuit by adding only two resistors (first resistor and second resistor) configured as a voltage divider. This minimal integration approach reduces area while maintaining relatively simple circuit integration, as the new components work seamlessly with existing circuit elements.
Data Source
AI summary
The present technology relates to a page buffer performing memory operation. According to the present technology, a page buffer may include a bit line voltage control circuit, a latch and a reference voltage supply circuit. The bit line voltage control circuit may selectively connect a bit line and a sensing node. The latch may provide a latch signal corresponding to data and an inverted latch signal. The reference voltage supply circuit may include a first PMOS transistor and a first NMOS transistor coupled in series between the sensing node and a ground voltage terminal, and apply a first reference voltage to the sensing node. The first PMOS transistor may be controlled according to the reference voltage control signal. The first NMOS transistor may be controlled by the inverted latch signal.