Page Buffer Switching Device Area Reduction via Series Voltage Elements
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing number of memory cells in memory devices leads to a larger device area, particularly due to the space occupied by high voltage elements with thin gate oxide layers and deep junctions used in page buffers for erase operations, necessitating a more compact switching device structure that maintains functionality.
Innovation Solution
A switching device for a page buffer comprising a series connection of high voltage and low voltage elements, where the high voltage element is connected to a sense amplification circuit and the low voltage element to a common source line, with both elements connected to a bit line, sharing a common active region, allowing for area reduction by replacing high voltage elements with low voltage elements and sharing the common source line active region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high voltage elements with thin gate oxide layers and deep junctions are used in page buffer for erase operations, then erase functionality is achieved, but the area occupied by these elements increases
Solution Approach 1:
The switching device is divided into multiple switching units, where each unit contains a high voltage element and a low voltage element connected in series. This segmentation allows the high voltage element to be shared across multiple switching units, reducing the total area required while maintaining erase functionality for all connected bit lines.
Solution Approach 2:
The high voltage element serves multiple functions by being shared among multiple switching units. A single high voltage element can enable erase operations for multiple bit lines simultaneously, making the structure universal and reducing redundant high voltage elements, thereby decreasing overall device area.
2Quantity of substance
If the number of memory cells is increased, then storage capacity is improved, but the device area increases
Solution Approach 1:
Multiple switching units share a common source line and can share high voltage elements through the series connection architecture. This merging of resources allows more memory cells to be accommodated without proportionally increasing the area of supporting circuits, thus improving storage capacity efficiency.
3Reliability
If high voltage elements are used for erase operations, then erase capability is maintained, but the switching device area increases
Solution Approach 1:
The switching device is segmented into modular switching units with standardized series connections of high and low voltage elements. This modular segmentation simplifies the overall design and reduces complexity by creating reusable building blocks, while still maintaining full erase capability across all bit lines.
Data Source
AI summary
A memory device having a switching device for a page buffer is provided, and includes a plurality of switching units coupled between a memory cell array and a sense amplification circuit of the page buffer. Each of the plurality of switching units further comprising: a high voltage element and a low voltage element that are connected in series to each other. A first end of the high voltage element is coupled to the sense amplification circuit, and a first end of the low voltage element is coupled to a common source line of the memory cell array. A second end of the high voltage element and a second end of the low voltage element are connected to each other and coupled to a corresponding bit line of the memory cell array. The common source line coupled to each of the plurality of switching units shares a common active region.