Page Buffer Tail Current Bias for Accurate NAND Sensing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Sensing operations in memory devices are prone to inaccuracies due to noise, interference, and process variations, leading to bit errors and incorrect data reading, particularly in high-density non-volatile memory devices like NAND flash.
Innovation Solution
Implementing tail current bias in the page buffer circuit using a tail current capacitor or switched capacitors to generate a tail current during sense operations, which stabilizes the bitline and improves signal-to-noise ratio, allowing accurate distinction between programmed and erased states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional sensing operations are used in high-density non-volatile memory devices, then device density is increased, but sensing accuracy deteriorates due to noise and interference
Solution Approach 1:
A tail current capacitor is introduced as an intermediary component coupled to the bitline to generate a tail current during sense operations. This tail current acts as a mediator that stabilizes the bitline voltage and compensates for noise and interference, thereby maintaining sensing accuracy in high-density memory devices without requiring changes to the fundamental memory cell structure
Solution Approach 2:
The patent changes the electrical parameters of the bitline by introducing a time-varying tail current generated from the tail current capacitor. This parameter change stabilizes the bitline voltage level during sensing operations, improving the signal-to-noise ratio and enabling accurate sensing in high-density memory configurations where conventional constant current approaches fail
2Device complexity
If conventional sensing operations are used, then device simplicity is maintained, but sensing accuracy deteriorates due to process variations and noise
Solution Approach 1:
The tail current capacitor serves as a relatively simple intermediary component that can be integrated into existing page buffer circuits without fundamentally redesigning the sensing architecture. It generates the necessary tail current to compensate for process variations and noise while adding minimal circuit complexity compared to the benefits gained in sensing accuracy
3Measurement precision
If longer precharge time is used to improve sensing accuracy, then measurement precision improves, but operation speed decreases
Solution Approach 1:
The tail current capacitor continuously supplies tail current during the sense operation, maintaining stable bitline conditions throughout the sensing process. This continuous stabilization allows for faster precharge times because the bitline remains at a stable voltage level, eliminating the need for extended precharge periods that would otherwise be required to compensate for voltage fluctuations and noise
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of tail current bias enhances the accuracy of sense operations by reducing variability, providing lower precharge time, higher immunity to fringe disturbs, and increasing the read window, thus improving overall performance.
Implementation Method 1
A tail current capacitor, or network of capacitors and switches, coupled to a bitline can be used to generate a tail current during a sense operation
Data Source
AI summary
A memory device includes a memory array with a plurality of memory cells formed at respective intersections of a plurality of wordlines and a plurality of bit lines. The memory device further includes a page buffer circuit coupled to the memory array, the page buffer circuit comprising sense circuitry to measure a cell current read from a bitline of the plurality of bitlines and tail current bias circuitry coupled to the bitline, wherein the tail current bias circuitry comprises a tail current capacitor having a first terminal coupled to the bitline, the tail current capacitor to generate a tail current in the bitline during a signal integration period when the sense circuitry measures the cell current read from the bitline.