Page Buffer Time-Based Sensing for Semiconductor Memory Read Speed

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Solution Overview

Problem

Current semiconductor memory devices require multiple read voltages to accurately read data from memory cells with different program states, which increases read operation time and circuit complexity.

Innovation Solution

A semiconductor memory device with a page buffer that precharges a sensing node to a first level and latches data by detecting the time it decreases to a second level based on the cell current of a selected memory cell, allowing a single read voltage to be applied during read operations, thereby reducing read operation time and circuit complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple read voltages are applied to memory cells with different program states, then data reading accuracy is improved, but read operation time increases and circuit complexity increases

Engineering Contradiction:
Improvedata reading accuracyVSAvoidread operation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent changes the sensing parameter from voltage level comparison (requiring multiple read voltages) to time-based potential decay detection. By measuring the time at which the sensing node potential decreases from a first level to a second level, the system can distinguish different program states using a single read voltage, thus reducing read operation time while maintaining data reading accuracy.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent changes the circuit configuration from multiple voltage generation circuits to a single read voltage circuit combined with a time-based latch component. This parameter change in the sensing mechanism reduces circuit complexity by eliminating the need for multiple voltage generation circuits while preserving the ability to accurately read data from memory cells with different program states.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If multiple read voltages are applied to memory cells with different program states, then data reading accuracy is improved, but circuit complexity increases

Engineering Contradiction:
Improvedata reading accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent changes the sensing parameter from voltage level comparison (requiring multiple read voltages) to time-based potential decay detection. By measuring the time at which the sensing node potential decreases from a first level to a second level, the system can distinguish different program states using a single read voltage, thus reducing read operation time while maintaining data reading accuracy.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent changes the circuit configuration from multiple voltage generation circuits to a single read voltage circuit combined with a time-based latch component. This parameter change in the sensing mechanism reduces circuit complexity by eliminating the need for multiple voltage generation circuits while preserving the ability to accurately read data from memory cells with different program states.

Inventive Principle:
Principle #35Parameter changes

3Loss of time

If a single read voltage is applied during read operations, then read operation time is reduced and circuit complexity is reduced, but the ability to read data from memory cells with different program states may be compromised

Engineering Contradiction:
Improveread operation timeVSAvoiddata reading accuracy
Core Design Contradiction:
Loss of timeVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by precharging the sensing node to a first potential level before the read operation begins. This precharging step prepares the sensing node to detect the time-based potential decay caused by cell current, enabling accurate distinction of different program states even with a single read voltage applied during the actual read operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent substitutes the mechanical/electrical system of multiple voltage generation circuits with a time-based sensing mechanism. By using a latch component that detects the time when the sensing node potential decreases from a first level to a second level, the system replaces complex voltage switching mechanisms with a simpler time-based detection approach, maintaining measurement precision while reducing circuit complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS11688440B2Page buffer and semiconductor memory device having the same
Publication Date: 2023.06.27 SK HYNIX INC
  • US11688440B2 patent drawing
  • US11688440B2 patent drawing
  • US11688440B2 patent drawing

AI summary

The present technology relates to a page buffer and a semiconductor memory device including the same. The page buffer includes a bit line selector configured to connect a bit line of a memory cell array to a sensing node, a precharger configured to precharge a potential of the sensing node to a first level, and a latch component configured to sense data by detecting a time at which the potential of the sensing node is decreased from the first level to a second level.