Page-Level Erase in Nonvolatile Memory
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Solution Overview
Problem
Conventional NAND type flash memory devices perform erase operations in units of cell blocks, limiting data update flexibility and requiring full block erasure and data relocation for partial data corrections, which restricts expandability and introduces interference with adjacent cells.
Innovation Solution
A nonvolatile memory device capable of performing erase operations in units of pages, where data from adjacent pages is read, stored as backup, and reprogrammed to prevent interference, allowing for flexible data management and increased expandability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If erase operation is performed in units of cell blocks, then all cells sharing the P well can be erased simultaneously, but it causes interference with adjacent cell blocks and limits data update flexibility
Solution Approach 1:
The patent divides the cell block into multiple independently erasable pages, each with its own selection transistors. This segmentation allows selective erasure of individual pages without affecting adjacent pages, eliminating the interference problem while maintaining efficient batch erasure capability within a page.
Solution Approach 2:
The patent introduces a new dimension of granularity by implementing page-level erasure capability within the existing block structure. This creates a hierarchical erasure structure where blocks contain multiple pages, and each page can be independently erased, adding flexibility without disrupting the overall block architecture.
2Reliability
If erase operation is performed in units of cell blocks, then full block erasure is achieved, but it requires additional data relocation operations for partial data corrections
Solution Approach 1:
By segmenting the block into independently erasable pages, the patent enables partial erasure operations. When only certain data needs correction, only the affected page needs to be erased and rewritten, rather than erasing the entire block and relocating all data, thus saving time while maintaining data integrity.
Solution Approach 2:
The patent implements partial erasure action by allowing erasure of only the necessary page(s) rather than the entire block. This partial action approach performs only the minimum required operation to achieve data correction, eliminating unnecessary data relocation overhead.
3Ease of manufacture
If erase operation is performed in units of cell blocks, then manufacturing simplicity is maintained, but data update flexibility is limited
Solution Approach 1:
The patent segments the block into pages with independent selection transistors, enabling flexible data update operations. This segmentation can be implemented by adding selection transistors in parallel with existing bit lines, maintaining relatively simple manufacturing processes while dramatically improving data update flexibility through partial page erasure and rewrite operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient erase operations in units of pages, preventing interference and enhancing the performance and expandability of nonvolatile memory devices by allowing partial data corrections without affecting adjacent pages.
Implementation Method 1
a voltage of 0 V is supplied to a memory cell through the cell selection transistor
Implementation Method 2
a power supply voltage is supplied to gates of the drain selection transistor, the source selection transistor, and the cell selection transistor within the pass transistor coupled to the selected cell block
Data Source
AI summary
A nonvolatile memory device includes a cell array including a plurality of pages, a selection unit configured to select one of the pages in response to a page selection address, an operation control unit configured to read data of a given number of pages adjacent to the selected page and output the read data as backup data, to erase data of the selected page, in response to a page erase command, and to reprogram update data and the backup data in the selected page and the adjacent pages, respectively, and a data storage unit configured to store the backup data.