Page-Level Load Order Queue for Speculative Execution
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Solution Overview
Problem
Existing processor architectures face performance limitations due to the inability to continue speculative execution when the load order queue is full, as all speculatively executed load instructions are added to it, leading to frequent stalling.
Innovation Solution
Implementing a page-level tracked load order queue that distinguishes between load instructions targeting the program stack and others, allowing multiple load instructions targeting the same memory page to share an entry, and using an activity counter to manage queue entries based on recency and reorder buffer states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all speculatively executed load instructions are added to the load order queue, then the queue maintains complete tracking of speculative loads, but the queue frequently becomes full causing speculative execution to stall
Solution Approach 1:
The patent segments the load order queue into two separate queues: a first load order queue for load instructions targeting the program stack, and a second load order queue for other load instructions. This segmentation allows independent management of stack loads (which are frequent and predictable) versus other loads, preventing the entire queue from stalling due to stack load saturation and thereby maintaining speculative execution throughput while preserving tracking accuracy.
2Productivity
If the load order queue size is increased to prevent overflow, then queue overflow is reduced, but the device complexity and resource usage increase
Solution Approach 1:
Rather than increasing the size of a single queue, the patent divides the tracking function into two smaller queues. This segmentation maintains manageable queue sizes while preventing overflow conditions that would stall execution, avoiding the need for larger, more complex queue structures.
Solution Approach 2:
The patent applies different queue management characteristics to different types of load instructions. Stack-loaded instructions (which exhibit predictable patterns) are managed in the first queue with potentially different overflow handling, while other loads are managed in the second queue. This local differentiation optimizes performance without requiring a uniformly large complex queue.
3Quantity of substance
If stack load instructions are separated into a dedicated queue, then storage efficiency is improved and queue overflow is prevented, but the device complexity increases due to multiple queues
Solution Approach 1:
The patent implements segmentation by creating a first load order queue specifically for stack load instructions and a second load order queue for other loads. This segmentation improves storage efficiency by dedicating appropriate queue space to each load type and prevents overflow of the overall tracking structure. The increased complexity is offset by the performance gains from specialized handling of frequent stack loads.
Solution Approach 2:
Each queue entry is designed with multi-functionality, containing fields that can represent both stack load characteristics and general load characteristics. This universal entry structure allows the same data format to serve both specialized stack load tracking and general load tracking, reducing the complexity increase that would otherwise result from having completely separate data structures.
Data Source
AI summary
Speculative execution using a page-level tracked load order queue includes: determining that a first load instruction targets a determined memory region; and in response to the first load instruction targeting the determined memory region, adding an entry to a page-level tracked load order queue instead of a load order queue, where the entry indicates a page address of a target of the first load instruction.