PAM-n Receiver Reference Adjustment for Accurate Bit Detection
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Solution Overview
Problem
Current signal modulation methods, such as Non-Return to Zero (NRZ) type encoding, fail to meet the increasing demand for high-capacity and high-speed data transmission, prompting the need for alternative methods like pulse amplitude modulation (PAM) to efficiently receive and process data signals.
Innovation Solution
A receiver is designed with multiple analog-digital converters (ADCs) that perform time-interleaving conversions and adjust a reference voltage based on feedback to accurately distinguish bit data in PAM-n signals, where n is 4 or greater, enabling efficient data transmission and reception through decision feedback equalization (DFE) operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If NRZ type encoding is used for data transmission, then the system is simple to implement, but it cannot meet the demand for high capacity and high speed data transmission
Solution Approach 1:
The patent implements dynamic reference voltage adjustment in the second ADC based on MSB data from both first and second sections. This dynamic adaptation allows the receiver to handle PAM-n signals with varying amplitude levels, enabling high-capacity transmission while maintaining signal accuracy through real-time voltage optimization
Solution Approach 2:
The patent divides the data signal processing into multiple sections with separate ADCs. The first ADC processes the first section and the second ADC processes the second section, with each converter handling specific bit data (MSB and LSB). This segmentation allows parallel processing of multiple signal components, increasing overall transmission capacity and speed
2Measurement precision
If reference voltage is not adjusted, then the conversion process is simple, but bit data distinction accuracy deteriorates in PAM-n signals
Solution Approach 1:
The patent employs feedback mechanisms where MSB data from the first and second sections are fed back to adjust the reference voltage in the second ADC. This feedback loop continuously optimizes the reference voltage based on actual signal characteristics, ensuring accurate bit data distinction while adapting to signal variations
Solution Approach 2:
The patent changes the reference voltage parameter dynamically based on the detected signal characteristics. By adjusting the reference voltage level according to the MSB data patterns in different sections, the system optimizes its measurement precision for distinguishing bit data in PAM-n signals without requiring a completely complex redesign
3Productivity
If multiple ADCs are used for time-interleaving conversion, then data transmission capacity increases, but device complexity increases
Solution Approach 1:
The patent designs the multiple ADCs to perform complementary functions within a unified PAM-n reception framework. Each ADC handles specific sections and bit data types (MSB/LSB), but all converters work together under the same control architecture with shared reference voltage adjustment mechanisms, reducing overall system complexity while maintaining high transmission capacity
Data Source
AI summary
A receiver includes an interface configured to receive a data signal based on an n-level pulse amplitude modulation (PAM-n) in which n is an integer equal to or greater than 4. The interface may include an analog-digital converting circuit configured to adjust a reference voltage, for distinguishing second bit data from the data signal in a second section, based on first bit data converted from the data signal in a first section and the first bit data converted from the data signal in the second section, the second section being after the first section.