Parallel Bit Error Detection Using Time Signatures
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional error-detection and correction methods in communication systems are inefficient due to their time complexity and requirement for expanded network width, leading to latency and increased power consumption, as they process entire data words sequentially and require additional bits for error correction, which can result in delayed detection of corrupted packets.
Innovation Solution
A time-based error-detection system that processes each bit of a data packet independently and in parallel, using a time signature with per-bit error information to detect errors and generate an error flag for immediate identification and correction, allowing for on-the-fly error detection and correction without the need for sequential processing of entire words.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional word-based error detection and correction is used, then error detection capability is provided, but processing time increases and latency occurs because the entire data word must be received before error-correction analysis can begin
Solution Approach 1:
The patent segments the error detection process by separating per-bit error detection from per-word error detection. Per-bit error detection is performed continuously on individual bits as they arrive, while per-word detection operates on complete words. This segmentation allows early error identification at the bit level without waiting for the entire word to be received, reducing processing time and latency while maintaining comprehensive error detection capability.
2Reliability
If traditional error correction codes are implemented, then error correction is achieved, but network width must be expanded to handle additional ECC bits
Solution Approach 1:
The patent transitions from spatial error correction (adding ECC bits in the horizontal dimension, expanding network width) to temporal error correction (adding time-based error signatures in the vertical dimension). The time signature contains per-bit error information that accumulates over time as bits are transmitted, allowing error detection without expanding the network width. This dimensional shift resolves the contradiction by preserving error correction capability while maintaining original network dimensions.
3Reliability
If traditional space-based error detection is used where the entire data word is examined at once, then comprehensive error checking is performed, but device complexity and time delay increase
Solution Approach 1:
The patent divides error detection into two independent segments: per-bit error detection that operates on individual bits as they arrive, and per-word error detection that operates on complete words. This segmentation simplifies the overall system complexity by breaking down the complex task of analyzing entire words into manageable per-bit operations, while still providing comprehensive error checking through the combination of both detection levels.
Data Source
AI summary
One embodiment of the present invention provides a system that facilitates detecting and correcting errors. The system operates by receiving a data packet comprised of p words on a communication pathway, wherein each bit of a word is received on a separate data line in a set of data lines that comprise the communication pathway. The system also receives a time signature t on the communication pathway, wherein t contains per-bit error information for the p words in the data packet. As the data packet is received, the system performs an error-detection operation on each data bit of the data packet in parallel, wherein the error-detection operation generates per-bit error information for each bit position across the p words in the data packet. Finally, the system compares the generated per-bit error-information with the corresponding per-bit error information in the time signature t to determine if there exists an error.