Parallel IC Chip Event Detection for Static Signal Isolation
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Solution Overview
Problem
Existing electronic circuits with multiple IC chips face challenges in reliably processing and transmitting signals due to potential IC failures, which can result in static output signals that affect data integrity.
Innovation Solution
The electronic circuit includes an event detector logic circuit configured to receive output signals from multiple IC chips, perform operations such as combined XOR operations, and generate a data output signal that is insensitive to static output signals, ensuring data integrity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple IC chips are connected in parallel to process signals, then the computing power and signal processing capability are improved, but the reliability deteriorates due to potential IC failures generating static output signals that affect data integrity
Solution Approach 1:
The patent introduces an event detector logic circuit as an intermediary between the parallel IC chips and the output. This mediator performs XOR operations on the output signals from multiple IC chips, effectively filtering out static signals from failed chips while preserving dynamic data signals. The intermediary transforms the unreliable parallel outputs into a reliable data stream by detecting actual events (signal transitions) rather than directly processing raw chip outputs.
Solution Approach 2:
The patent converts the harmful effect of static output signals from failed IC chips into a beneficial filtering mechanism. By using XOR logic, the static signals (which are constant 0 or 1) from failed chips cancel each other out or become indistinguishable from the background, while dynamic data signals (which transition between 0 and 1) remain detectable. This transforms the problem of static noise into a solution where only actual events are transmitted.
2Device complexity
If static output signals from failed IC chips are present, then the complexity of signal processing increases, but the ability to distinguish actual data from static signals deteriorates
Solution Approach 1:
The event detector logic circuit serves as a mediator that simplifies the detection process. Instead of requiring complex analysis to distinguish data from static signals, the XOR-based event detector automatically filters out static components and only passes through actual data transitions. This intermediary reduces the detection difficulty by transforming the signal representation into a form where data is inherently separated from noise.
3Ease of operation
If IC chips are electrically connected in parallel between control bus and event detector, then the ease of operation is improved, but the reliability worsens due to potential failure propagation
Solution Approach 1:
The patent maintains the simple parallel electrical connection for ease of operation while converting the potential harm of failure propagation into a benefit. The XOR logic in the event detector ensures that static signals from failed chips are automatically neutralized. In fact, the parallel connection becomes beneficial because multiple failed chips producing identical static signals will cancel each other out through the XOR operation, improving reliability while maintaining operational simplicity.
Data Source
AI summary
An electronic circuit includes: an event detector logic circuit; a computing device; and a plurality of integrated circuit (IC) chips that are electrically connected in parallel between at least one control bus configured to provide input signals and the event detector logic circuit. The event detector logic circuit is configured to: receive a plurality of output signals from the plurality of IC chips, generate a data output signal that includes data obtained from a first output signal of the plurality of output signals, and transmit the data output signal to the computing device.