Parallel Wide-Bandgap Chip Layout for Oscillation Suppression
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Solution Overview
Problem
Semiconductor devices using wide bandgap semiconductors like silicon carbide experience signal oscillation during steady state, startup, and short circuit operations, particularly when semiconductor chips are connected in parallel.
Innovation Solution
The semiconductor device connects multiple semiconductor chips with a conductive part, using wide bandgap semiconductors with a channel length of 1.5 μm or less, and incorporates features like a termination structure and freewheeling diodes to suppress oscillation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If semiconductor chips are connected in parallel to increase current capacity, then the device can handle higher currents, but signal oscillation occurs during operation
Solution Approach 1:
The patent changes the channel length parameter of the semiconductor switching elements to 1.5 μm or less, which modifies the electrical characteristics to reduce parasitic capacitance. This parameter change allows parallel-connected chips to maintain signal stability while handling higher currents, resolving the oscillation problem.
Solution Approach 2:
The patent applies different channel length specifications to different semiconductor switching elements in the parallel configuration. By optimizing the channel length locally in each switching element, the design minimizes parasitic capacitance at the source, thereby suppressing signal oscillation while maintaining high current capacity.
2Reliability
If channel length is reduced to minimize parasitic capacitance, then oscillation is suppressed, but manufacturing precision requirements increase
Solution Approach 1:
The patent establishes a specific parameter threshold (channel length of 1.5 μm or less) that balances oscillation suppression with manufacturability. This parameter setting is optimized to provide sufficient margin for manufacturing variations while achieving the desired reduction in parasitic capacitance.
3Reliability
If channel length is reduced to 1.5 μm or less, then parasitic capacitance decreases and oscillation is suppressed, but device complexity increases
Solution Approach 1:
The patent achieves signal stability through a parameter change (channel length reduction) rather than through complex circuit configurations or additional components. This simple structural modification avoids increasing device complexity while effectively suppressing oscillation.
Data Source
AI summary
A semiconductor device includes: a plurality of semiconductor chips spaced apart from one another; and a conductive part. The plurality of semiconductor chips include respective semiconductor switching elements. The conductive part connects the plurality of semiconductor chips in parallel. A material of the semiconductor switching elements of the plurality of semiconductor chips includes a wide bandgap semiconductor. At least one of the semiconductor switching elements has a channel length of 1.5 μm or less.