Parallel DMOS Switch Gate Drive for Constant Vgs Near Supply Rails

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Solution Overview

Problem

DMOS devices face limitations in gate-to-source voltage (Vgs) restrictions, requiring novel drive schemes to turn on and off while maintaining minimal distortion and leakage, especially when operating near supply rails.

Innovation Solution

A parallel DMOS switch configuration using pairs of PDMOS and NDMOS devices connected in series and parallel, with a single or dual-amplifier circuit generating gate input voltages that track the source voltage, ensuring rail-to-rail operation and minimizing leakage through unity gain buffering and Zener diode voltage offsets.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If DMOS devices are operated with gate voltage referenced to source voltage to satisfy maximum Vgs restriction, then device reliability is improved, but switch operation complexity increases due to need for novel drive schemes

Engineering Contradiction:
Improvedevice reliabilityVSAvoidswitch operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The DMOS switch is divided into two separate switches: a first DMOS switch with first DMOS devices having first source terminals connected to first drain terminals, and a second DMOS switch with second DMOS devices having second source terminals connected to second drain terminals. Each switch operates independently with its own gate voltage control, allowing simplified drive schemes while maintaining reliability through proper Vgs management in each segment.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A coupling circuit is introduced as an intermediary between the first and second DMOS switches. This coupling circuit includes coupling elements that electrically connect the first drain terminals to the second source terminals, enabling signal transmission between the switches while maintaining proper voltage referencing and simplifying the overall drive scheme.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If signal is passed through DMOS switch with minimal distortion, then signal quality is improved, but current loss increases due to leakage

Engineering Contradiction:
Improvesignal qualityVSAvoidcurrent loss
Core Design Contradiction:
Manufacturing precisionVSLoss of energy

Solution Approach 1:

The first and second DMOS switches are merged into a single parallel DMOS switch structure where the switches operate in parallel. This combination allows the circuit to benefit from the low distortion characteristics of both switches while the parallel configuration reduces overall leakage current, as the leakage paths are distributed and can be better managed.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If DMOS switch operates near supply rails for rail-to-rail operation, then voltage range is improved, but flatness/linearity degrades due to increased Ron

Engineering Contradiction:
Improvevoltage rangeVSAvoidflatness/linearity
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The parallel DMOS switch structure enables dynamic operation where both switches can be controlled independently to optimize performance across the voltage range. Near the supply rails, one switch can be prioritized for conduction while the other provides complementary operation, maintaining better linearity and flatness throughout the rail-to-rail voltage range compared to a single switch configuration.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8829975B2Methods and circuits for operating a parallel DMOS switch
Publication Date: 2014.09.09 ANALOG DEVICES INC
  • US8829975B2 patent drawing
  • US8829975B2 patent drawing
  • US8829975B2 patent drawing

AI summary

A method and corresponding circuits for operating a parallel DMOS switch that includes a pair of P-type DMOS devices connected in series with each other and in parallel with a pair of N-type DMOS devices connected in series with each other. The method and circuits involve turning the switch on by applying gate signals to the DMOS device pairs which are generated using at least one source voltage of a DMOS device pair. The switch is turned off by setting the gate signals equal to the respective source voltages of the DMOS device pairs.