Parallel ESD Detection Unit for ASIC Surface Area Optimization
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Solution Overview
Problem
Existing ESD protection circuits in integrated circuits are not reliable in detecting the number of electrostatic discharges, often leading to damage due to insufficient protection and requiring a large surface area, which can result in increased leakage current and capacitance, affecting the ASIC's functionality.
Innovation Solution
A device with a detection unit connected in parallel to the discharge protection unit, comprising a power block, logic unit, and memory block, which generates an output signal representing the number of electrostatic discharges, operating independently of the ASIC's active or passive state, and capable of storing information about ESD events without increasing the surface area or affecting the ESD protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ESD clamps are dimensioned to protect ASIC from high voltages, then protection capability is improved, but surface area consumption increases up to 30% of total circuit size
Solution Approach 1:
The patent introduces a detection unit as an intermediary component that monitors ESD events without directly participating in the protection mechanism. This separate detection system allows the ESD clamp to be optimized for protection while the detection unit independently tracks discharge events, eliminating the need to oversize the clamp for detection purposes.
Solution Approach 2:
The patent segments the ESD protection system into two independent functional blocks: the ESD clamp (protection function) and the detection unit (monitoring function). This segmentation allows each component to be optimized independently - the clamp for minimal surface area protection and the detection unit for accurate event counting - rather than requiring one oversized component to perform both functions.
2Area of stationary object
If ESD clamps are dimensioned as cost-effectively as possible, then surface area is reduced, but they may no longer sufficiently protect the ASIC from unexpected high voltages
Solution Approach 1:
The detection unit provides feedback about ESD event history to the system, enabling monitoring of the clamp's performance and detection of degradation. This feedback mechanism allows the system to track the number of discharge events and identify when the clamp may no longer be providing sufficient protection, enabling proactive replacement before failure occurs.
Solution Approach 2:
The detection unit continuously monitors and counts ESD events in advance, allowing the system to identify trends and predict when the clamp will reach its discharge limit. This preliminary detection enables scheduled maintenance and replacement before the protection capability actually degrades, ensuring continuous reliability.
3Measurement precision
If detection circuits are added to monitor ESD events, then detection capability is improved, but additional surface area and power consumption are required
Solution Approach 1:
The detection unit is designed to be self-powered by harvesting energy from the ESD events it detects. The circuit uses the voltage transient from the ESD clamp during a discharge event to charge a capacitor, which then powers the detection and counting logic. This self-service approach eliminates the need for continuous external power supply to the detection unit.
Solution Approach 2:
The detection circuit recovers and stores energy from the ESD discharge events that would otherwise be wasted. By capturing the voltage transient through a capacitor during each discharge event, the system recovers energy that can be used to power subsequent detection operations, effectively discarding none of the ESD event energy but rather utilizing it productively.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables reliable monitoring and recording of ESD events, allowing for precise determination of ASIC stress and extending its service life by detecting and preventing potential damage, with minimal additional surface area requirements and no adverse effects on ESD protection.
Implementation Method 1
Electrostatic discharges (ESD) in and/or through the chip are one type of stress. These arise due to charge separation and charge collection, if two surfaces of materials having different electron affinities touch.
Implementation Method 2
A device for detecting a number of electrostatic discharges (100) includes a discharge protection unit (103). Electrically connected in parallel to the discharge unit is a detection unit (107).
Data Source
AI summary
A device for detecting a number of electrostatic discharges including a discharge protection unit, in which a detection unit is electrically connected in parallel to the discharge protection unit and the detection unit generates an output signal, which represents the number of electrostatic discharges. A related method is also described.