Parallel Memory Interfaces for Pre-Assembly Probing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory devices face challenges in evaluating the performance characteristics of memory dies before or during assembly in a multiple-die stack, as probing contacts can cause damage, leading to reduced effectiveness or inoperability of the contacts.
Innovation Solution
Implementing parallel interfaces on memory dies, with separate sets of contacts for evaluation operations and access operations, allowing for evaluation without damaging the contacts used for mission-mode operations. These contacts can be configured with specific geometries and bonding techniques to support precise interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If probing contacts are used to evaluate memory die performance, then evaluation capability is improved, but contact damage occurs reducing reliability
Solution Approach 1:
The patent divides the contact interface into two separate sets: first contacts dedicated to evaluation operations and second contacts dedicated to mission-mode operations. This segmentation allows evaluation probing to occur on the first contacts without damaging the second contacts that will be used for actual device operation, thereby resolving the contradiction between evaluation capability and contact reliability.
2Reliability
If separate contact sets are implemented for evaluation and access operations, then contact protection is improved, but device complexity increases
Solution Approach 1:
The patent introduces an intermediary mechanism (the first set of contacts) that mediates between the evaluation process and the mission-mode contacts. This intermediary allows evaluation operations to be performed without directly interacting with the second contacts, providing protection while managing the complexity through a clear functional separation.
3Measurement precision
If multiple contact sets are used, then evaluation precision is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies local quality by assigning different geometries and configurations to different contact sets based on their specific functions. The first contacts are optimized for evaluation probing with appropriate spacing and accessibility, while the second contacts are optimized for mission-mode operations with different geometric requirements. This localized optimization allows each contact set to be manufactured with precision tailored to its specific purpose.
Data Source
AI summary
Methods, systems, and devices for memory with parallel main and test interfaces are described. A memory die may be configured with parallel interfaces that may individually (e.g., separately) support evaluation operations (e.g., before or as part of assembly in a multiple-die stack) or access operations (e.g., after assembly in a multiple die stack). For example, a memory die may include a first set of one or more contacts that support communicating signaling with or via another memory die in a multiple-die stack. The memory die may also include a second set of one or more contacts that support probing for pre-assembly evaluations, which may be electrically isolated from the first set of contacts. By implementing such parallel interfaces, evaluation operations may be performed using the second set of contacts without damaging the first set of contacts, which may improve capabilities for supporting a multiple-die stack in a memory device.