Parallel Roll Call Circuit for Semiconductor Memory Testing
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Solution Overview
Problem
Existing semiconductor memory devices require lengthy roll call tests due to the sequential output of roll call data from multiple memory arrays, which slows down the process of identifying and replacing defective memory cells.
Innovation Solution
The semiconductor device employs a parallel output of roll call data from multiple roll call circuits to common data buses, allowing simultaneous testing and data collection across multiple memory banks, thereby reducing the overall testing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If roll call data from multiple memory arrays is output sequentially through masking, then device complexity is reduced, but testing time increases significantly
Solution Approach 1:
The patent divides the roll call data output into multiple independent data buses (first data bus and second data bus), allowing parallel transmission of roll call data from different memory arrays. This segmentation enables simultaneous output of multiple data streams without requiring complex masking operations, thus reducing testing time while maintaining manageable device complexity.
Solution Approach 2:
The patent transitions from sequential output (single dimension in time) to parallel output by introducing multiple data buses (adding spatial dimension). This allows roll call data from multiple memory arrays to be transmitted simultaneously across different data buses, effectively converting a time-sequential process into a space-parallel process.
2Productivity
If parallel roll call testing is performed across multiple memory arrays, then testing speed improves, but data output complexity increases
Solution Approach 1:
The patent segments the data output path into multiple independent data buses, each handling roll call data from specific memory arrays. This segmentation simplifies the output circuit design by avoiding the need for complex masking and selection logic, while still enabling parallel testing across multiple arrays.
Solution Approach 2:
The patent creates a universal data output structure where multiple data buses can simultaneously carry roll call data from different memory arrays. This multi-functional output structure handles parallel data streams efficiently without requiring separate dedicated paths for each array, balancing productivity improvement with circuit complexity management.
Data Source
AI summary
Disclosed herein is an apparatus that includes: a plurality of memory banks each including a plurality of memory cells; a plurality of redundant circuits each allocated to an associated one of the plurality of memory banks to replace a defective memory cell among the plurality of memory cells included in the associated memory bank; a plurality of roll call circuits allocated to an associated one of the plurality of memory banks to generate a roll call data when an address corresponding to the defective memory cell is supplied; and a plurality of data buses commonly allocated to the plurality of memory banks. The roll call circuits output the roll call data to the plurality of data buses in parallel.