Parallel Unidirectional Selectors for Low-Leakage Memory Cells
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Solution Overview
Problem
Conventional STT-MRAM memory cells have limited cell size and are prone to current leakage, making them less competitive compared to monolithic 3D memory architectures, which are stacked on a substrate.
Innovation Solution
A nonvolatile memory architecture featuring first and second unidirectional selectors coupled in parallel to a nonvolatile memory element, each with specific electrode and insulator layers that form permanent and volatile conductive paths upon application of voltages, reducing current leakage and enabling efficient stacking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bidirectional selector devices are used in conventional nonvolatile memory architecture, then the memory cell can be configured with access transistor and memory element, but current leakage increases significantly
Solution Approach 1:
The selector device is segmented into two separate unidirectional selectors, each allowing current flow in only one direction. This segmentation eliminates the bidirectional current leakage problem while maintaining the necessary memory cell functionality through parallel configuration
Solution Approach 2:
Instead of using a single bidirectional selector that allows current in both directions (causing leakage), the invention inverts the approach by using two unidirectional selectors with opposite polarity requirements, where each selector blocks current in one direction and conducts in the other, thereby eliminating leakage
2Reliability
If conventional nonvolatile memory architecture is used, then the memory cell can store data, but the cell size becomes large reducing competitiveness with monolithic 3D memory
Solution Approach 1:
The invention merges the selector and memory element functions into a more integrated structure where two unidirectional selectors are coupled in parallel to the memory element, sharing common electrodes and reducing redundant components, thereby decreasing the overall cell size while maintaining data storage capability
Solution Approach 2:
The memory cell structure transitions toward a more compact dimensional arrangement by stacking layers vertically and utilizing three-dimensional electrode configurations, allowing smaller footprint area while maintaining full functionality, thereby competing with monolithic 3D memory architectures
3Reliability
If unidirectional selectors with permanent and volatile conductive paths are implemented, then current leakage is reduced, but the manufacturing process becomes more complex
Solution Approach 1:
The permanent conductive path is formed in the insulator layer during the preliminary fabrication stages using standard semiconductor processing techniques, establishing a stable baseline structure before adding the volatile conductive path formation steps, thereby managing manufacturing complexity through staged processing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed architecture reduces current leakage and allows for cost-effective manufacturing of nonvolatile memory cells with improved scalability, enabling efficient stacking and competitive performance with monolithic 3D memory.
Implementation Method 1
The first insulator layer of the first unidirectional selector includes therein a permanent conductive path
Implementation Method 2
the second insulator layer of the first unidirectional selector is operable to form therein a volatile conductive path upon application of a potential across the first unidirectional selector
Implementation Method 3
first and second unidirectional selectors coupled in parallel to a nonvolatile memory element... reducing current leakage
Data Source
AI summary
The present invention is directed to a memory cell including first and second unidirectional selectors coupled in parallel to a nonvolatile memory element. Each of the first and second unidirectional selectors includes first, second, and third electrode layers; a first insulator layer interposed between the first and second electrode layers; and a second insulator layer interposed between the second and third electrode layers. The first insulator layer of the first unidirectional selector includes therein a permanent conductive path and the second insulator layer of the first unidirectional selector is operable to form therein a volatile conductive path upon application of a potential across the first unidirectional selector. The second insulator layer of the second unidirectional selector includes therein another permanent conductive path and the first insulator layer of the second unidirectional selector is operable to form therein another volatile conductive path upon application of another potential across the second selector.


