Heterogeneous Parallel System Memory Permission Control

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Solution Overview

Problem

In heterogeneous parallel systems, unnecessary data transfer occurs between main memory and accelerator memory due to inefficient data management, leading to reduced computational performance.

Innovation Solution

The method involves turning off write permissions for input data areas in main memory corresponding to accelerator memory areas before computation and turning off read permissions for output data areas after computation, ensuring data is only transferred when necessary, using system calls to manage memory permissions and page faults.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is continuously transferred between main memory and accelerator memory, then data availability is improved, but data transfer overhead increases and computational performance decreases

Engineering Contradiction:
Improvedata availabilityVSAvoidcomputational performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary actions by setting memory permissions (read-only or write-only) on main memory areas before computation tasks are executed. This preliminary permission configuration enables the system to prevent unnecessary data transfers in advance, thereby reducing data transfer overhead while ensuring data availability when needed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces memory permission attributes as an intermediary mechanism between main memory and accelerator memory. These permissions act as a mediator that controls data access and transfer, allowing the system to maintain data availability while minimizing unnecessary transfers by blocking access paths that don't require actual data movement.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If memory permission management is implemented to reduce data transfer, then computational efficiency is improved, but system complexity increases

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidmemory management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system implements self-service by automatically managing memory permissions through the computing device's own memory management unit (MMU). The MMU autonomously handles permission setting and enforcement without requiring external intervention or complex manual configuration, thereby improving computational efficiency while keeping the system manageable.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent employs feedback mechanisms where the system monitors computation task requirements and automatically adjusts memory permissions accordingly. This feedback loop allows the system to dynamically optimize data transfer based on actual computation needs, improving efficiency while maintaining manageable complexity through automated adaptation.

Inventive Principle:
Principle #23Feedback

3Loss of energy

If data transfer is minimized by restricting memory access, then data transfer overhead is reduced, but programming flexibility is limited

Engineering Contradiction:
Improvedata transfer overheadVSAvoidprogramming flexibility
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The system applies dynamics by making memory permissions changeable and adaptable rather than fixed. Memory access permissions can be dynamically adjusted based on computation task requirements, allowing the system to reduce data transfer overhead for standard operations while maintaining the flexibility to accommodate diverse programming needs when necessary.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent utilizes parameter changes by modifying memory permission attributes (read-only, write-only, read-write) based on computation requirements. This parameter-based control enables the system to minimize data transfer overhead for common scenarios while preserving programming flexibility through configurable permission settings that can be adapted to different application needs.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10725667B2Method of transferring data in parallel system, and parallel system for performing the same
Publication Date: 2020.07.28 SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
  • US10725667B2 patent drawing
  • US10725667B2 patent drawing
  • US10725667B2 patent drawing

AI summary

Disclosed herein are a method of transferring data in a parallel system including a main device and at least one accelerator, and a parallel system for performing the method. The method of transferring data in a heterogeneous system including a main device and at least one accelerator includes: turning off a write permission for a first main memory area corresponding to a first accelerator memory area where input data for a computation task is stored; performing the computation task by using the at least one accelerator; and turning off a read permission for a second main memory area corresponding to a second accelerator memory area where output data for the computation task is stored, in the state in which data of the second accelerator memory area has not been transferred to the second main memory area.