Parallelism Extraction for Engine Control Programs
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Solution Overview
Problem
Conventional methods for parallelizing engine control programs struggle to efficiently utilize multicore processors due to difficulties in handling conditional branches and assignment statements, leading to increased latency and power consumption, especially in vehicle control systems where real-time processing is critical.
Innovation Solution
A parallelization method that includes conditional branch copying and task fusion to extract parallelism, allowing for static scheduling and efficient distribution of computational loads across multiple processor cores, thereby reducing latency and improving processing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional parallelization methods are used on multicore processors, then processing speed can be improved, but handling of conditional branches and assignment statements causes increased latency
Solution Approach 1:
The patent segments the program into basic blocks and further divides them into parallelizable units. By segmenting conditional branches into separate parallel paths and using task fusion to merge independent segments, the method enables simultaneous execution of multiple code segments on different processor cores, thereby improving processing speed while managing latency through structured division of computational tasks.
Solution Approach 2:
The patent dynamically analyzes data dependencies between basic blocks and adjusts the parallelization strategy accordingly. The parallelization degree is determined based on runtime or static dependency analysis, allowing the system to adaptively optimize the balance between speed improvement and latency reduction by adjusting how aggressively code is divided and executed in parallel.
2Power
If processing frequency is increased to enhance processor functionality, then computational capability is improved, but power consumption increases significantly
Solution Approach 1:
By segmenting the computational workload into independent basic blocks and parallel tasks, the patent enables distribution of computation across multiple lower-frequency processor cores. This segmentation allows the system to achieve equivalent computational capability to a single high-frequency core while consuming less power, as each core operates at lower frequency simultaneously rather than one core operating at high frequency.
Solution Approach 2:
The patent changes the operational parameters by transitioning from single-core high-frequency execution to multi-core parallel execution. This parameter change in the processing architecture allows the system to maintain computational capability while reducing power consumption, as the parallel execution model on multiple cores is more energy-efficient than increasing the frequency of a single core.
3Productivity
If manual program parallelization is performed, then parallel processing capability is achieved, but development period and cost increase
Solution Approach 1:
The patent implements automated parallelization through compiler-based analysis and transformation. The system performs self-service by automatically analyzing data dependencies, identifying parallelizable basic blocks, and generating parallel code without requiring manual programmer intervention. This automation achieves parallel processing capability while eliminating the time and cost overhead of manual parallelization efforts.
Solution Approach 2:
The patent replaces the mechanical process of manual program analysis and parallelization with an automated computational system. The compiler-based approach substitutes human programmers' manual work with algorithmic analysis that automatically detects dependencies and generates parallel code, dramatically reducing development time and cost while maintaining or improving parallel processing capability.
4Productivity
If asymmetric multicore processing with functional distribution is used, then throughput is improved, but latency reduction is difficult and load balancing becomes problematic
Solution Approach 1:
The patent segments the program into fine-grained basic blocks that can be dynamically assigned to different processor cores. This segmentation enables more flexible load distribution compared to coarse functional distribution, allowing independent basic blocks to be executed in parallel while maintaining better load balance. The fine-grained segmentation helps reduce latency by enabling more opportunities for parallel execution without the overhead of coarse functional distribution.
Solution Approach 2:
The patent employs dynamic scheduling and load balancing mechanisms that adaptively assign basic blocks to processor cores based on current system state and dependency analysis. This dynamic approach improves upon static functional distribution by allowing runtime optimization of task assignment, thereby reducing latency through better load balancing while maintaining high throughput through efficient parallel utilization of all available cores.
Data Source
Figure 1A
Figure 1B
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AI summary
A method of extracting parallelism of an original program by a computer includes: a process of determining whether or not a plurality of macro tasks to be executed after a condition of one conditional branch included in the original program is satisfied are executable in parallel; and a process of copying the conditional branch regarding which the macro tasks are determined to be executable in parallel, to generate a plurality of conditional branches.