Parallelized Successive Cancellation Decoding for Polar Codes

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Solution Overview

Problem

Polar codes in communication systems face high decoding latency and computational complexity due to their serial nature, which is exacerbated by list decoding, limiting their performance in 5G communication and memory systems.

Innovation Solution

The implementation of a parallelized successive cancellation decoding and list decoding method that applies parallelism to the decoding node tree structure, allowing multiple successive cancellation decoders to operate in parallel at specific levels, reducing decoding latency and maintaining performance through error-checking mechanisms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If successive cancellation decoding is used for polar codes, then computational complexity is reduced to O(N log N), but decoding latency increases to O(N log N) due to serial processing

Engineering Contradiction:
Improvecomputational complexityVSAvoiddecoding latency
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The decoding process is segmented into multiple independent parallel decoders, each handling a portion of the decoding tree. The codeword is divided into segments that can be processed simultaneously by different decoder units, transforming the serial O(N log N) process into parallel operations that reduce latency while maintaining O(N log N) computational complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of parallelism by deploying multiple decoder units that operate simultaneously on different segments of the decoding tree. This dimensional expansion from serial to parallel processing allows multiple decoding operations to occur at the same time, reducing the time complexity from O(N log N) to O(N) while preserving the computational efficiency of successive cancellation decoding.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If list decoding is applied to improve decoding performance, then error correction capability is enhanced, but computational complexity increases L-fold to O(LN log N)

Engineering Contradiction:
Improvedecoding performanceVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The list decoding process is segmented into L independent successive cancellation decoders, each processing a different hypothesis in parallel. By dividing the complex list decoding task into L simpler SCD operations that run simultaneously, the patent achieves L-fold parallelism, maintaining O(LN log N) computational complexity while reducing actual decoding time and improving reliability through multiple hypothesis evaluation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple successive cancellation decoders are merged into a unified parallel processing architecture where L decoders work simultaneously on different candidate paths. This merging of multiple SCD units into a single list decoding system achieves both improved reliability through list processing and efficient resource utilization by combining the computational power of multiple decoders.

Inventive Principle:
Principle #5Merging (Combining)

3Speed

If parallel processing is implemented to reduce decoding latency, then decoding speed is improved, but device complexity and resource requirements increase

Engineering Contradiction:
Improvedecoding speedVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The decoding workload is segmented into M independent parallel processing units, each handling a specific portion of the decoding tree. This segmentation allows simultaneous processing of multiple node sets, achieving a speedup factor of M while distributing the computational burden across multiple simpler units rather than requiring one complex sequential processor.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each parallel decoder unit is designed as a universal module capable of processing different segments of the decoding tree. This multi-functional design allows the same hardware or software module to be replicated M times, each handling different portions of the work, thereby reducing overall device complexity through standardization while achieving M-fold speedup through parallel execution.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10673467B2Apparatus and method for parallelized successive cancellation decoding and successive cancellation list decoding of polar codes
Publication Date: 2020.06.02 SAMSUNG ELECTRONICS CO LTD
  • US10673467B2 patent drawing
  • US10673467B2 patent drawing
  • US10673467B2 patent drawing

AI summary

An apparatus and a method. The apparatus includes a receiver including an input for receiving a codeword of length mj, where m and j are each an integer; a processor configured to determine a decoding node tree structure with mj leaf nodes for the received codeword and receive an integer i indicating a level at which parallelism of order m is applied to the decoding node tree structure; and m successive cancellation decoders (SCDs) configured to decode, in parallel, each child node in the decoding node tree structure at level i.